Design And Implementation Of Shared-Clock Multithreading Processing Element

Since the Integrated Circuit emerged, the number of transistors on a single integrated circuit chip has been on the increase, as well as the processor working frequency. However the power consumption has also been increasing. The traditional processor architecture is facing a bottleneck. Increasing the number of transistors or the working frequency cannot meet the demand for processing power. Since then, the SMT technology and CMP technology have come to sight. Both have advantages and disadvantages, but the combination of SMT and CMP has made a progress in the processor performance. This structure of the processor has the following characteristics, such as simple structure, high degree of plasticity and high parallelism. Moreover, the delay problem caused by the communication between microprocessor cores can be solved with the help of thread switching principle. It can be said this combination of SMT and CMP has injected new vitality to the development of processors, as a guided the processors’s future study.The shared-clock multithreading processor is a multi-core and multi-threading processor with special functions. It contains many excuting mode and supports ILP, TLP and DLP. As important part of the shared-clock multithreading processor, processing element needs better design to support specialities of processor. In this paper, processing element is designed and realized. Followings are my work contents.1.The parallel processor and parallel technique have been analyzed. And the architecture and functional requirements of the shared-clock multithreading processor has been researched.2.According to the design requests of the shared-clock multithreading processor, the processing element can communicate between thread and thread or core and core with block and nonblack mode, based on Simultaneous Multi-Threading.3.The testbench has been built, including front-end processor, processing elements, thread manager and co-processor. It is used to test and verify the whole system function of processing element.The experimental results show that the processing element both excutes arithmetic and logic unit or special functions and communicate between thread and thread or core and core. And SMT is used to improve utilization and throughput capacity of excuting resources of processing element. Finally, we use Virtex7 XC7V2000T FPGA development board of Xilinx corporation to verify performance of this circuits. PEs can work well at the frequency of 152MHz. The circuit meets the design requirements.