Research On The Key Technologies Of Software And Hardware Of Parallel Task Schedyling Of Multi-core Network Processor

With the rapid development of Internet, network bandwidth is growing rapidly,making the growing requirements of programmable and multi-functional NetworkProcessors，and the growing need to develop better applications for higher performanceof multi-core processors. However, the flexibility and efficiency of network processorsoftware programming has not been developed well, the parallel processing need to takeboth the parallel architecture of hardware and the parallel execution efficiency ofsoftware into account. Therefore, an effective parallel processing method or technique isnecessary to fully exploit the multi-core and multithreaded architecture for parallelperformance advantages.The key technologies and implementation of the data plane software of networkprocessor is studied by this dissertation. In order to solve the key issues of software, andtake advantage of the performance advantages of the parallel processing, a number ofkey solutions is proposed. The function pipeline based on multi-core and multi-threadedhardware, is the hybrid parallel pipeline technology, to solve the shortcomings andbottlenecks of the traditional serial and parallel structure, and ensure the load balancingand the parallel scheduling. On this basis, a parallel task scheduling method is proposedto ensure load balancing and parallel processing; The synchronous communicationmethod between hardware threads can transmit the state information of processing andmaitain the order of receive and transmit; the “read lock” method based on the sharedqueue structure ensure the mutual exclusion of threads accessing to shared resources.The study and design of the key technologies of the data plane software iscompleted in the dissertation, a comprehensive simulation and performance analysis isachieved. Through the performance evaluation of the data plane software, it canimplement routing function and support the network processor system to store andforward packets, and the actual statistical bandwidth of1Gb/s.