The Research Of Ladder Diagram Parallel Component Extraction And Parallel Display

As one of five standard programing languages defined by IEC61131-3,LadderDiagram is favored by programmer and has become the main language for controlprogram in industrial control area because of its simple grammar,order structure andgraphical program style. Rung is the foundation of Ladder Diagram.Program isexecuted by processor according to the Rung list sequentially. In this way the executionspeed will be restricted so that Ladder Diagram can’t be used in rapid response field.Parallel compiling based on configurable hardware structure in FPGA is presented forthis problem. Ladder Diagram compiled in parallel manner can run in PFGA fast andcan be used in high speed field.Some researches about the parallelizing compiling theory of Ladder Diagram basedon FPGA has been made in this essay, the main work is as following:(1)Through depth analysis of the IEC61131-3programming standard andLadder Diagram, this paper proposed a method of an abstract description of theLadder Diagram programusing active network of vertices (AOV),and achieved theseparation of the ladder subprograms.(2) The paper presents a reverse split algorithm based on multi-output rung logicalstructure,which can complete the multi-output rung efficient split by introducingauxiliary rungs and temporary variables.(3) This paper proposes an algorithm which can process JMP,CALL and FORinstructions respectively, realize the transformation from control dependencies to datastream dependencies between rungs initiated by these three instructions, eliminate thecontrol dependencies of rungs while completely retaining the logical dependencybetween rungs.(4) The paper proposed a procedure to achieve the ladder diagram parallelizationfor the first time. When a rung in ladder diagram gets its own number, it updates itsvariable’s latest I/O period according to the a dynamic tag table which consists ofdependent variable’s I/O period. But in order to determine the rung’s number in theperiod,it should use look-up table to define parallel relationship between rungs firstly.(5) In this step, this paper converted every single-output rung of parallel Ladder Diagram into a VHDL statement first, and then those VHDL statements are combinedinto a complete VHDL program according to the execution cycle number of everysingle-output rung.(6) The last step is to maintain and parallel display the parallel ladder diagram.The last part of the paper gives a test case is used to verify the correctness of thetransformation idea, the final test results verify the correctness of the transformationmethod.