Design And Realization Of Signal Processing Platform Based On Structure Of Data Switching

The improvement of radar signal processing technology have put forward higher requirement to the speed of digital signal processing and that of digital signal transmission. Traditional data bus technology, single-core processor and single board processing platform has been far from satisfying the digital signal processing requirements. Based on application, a new type of radar signal processing platform is designed in this paper. The platform is based on data flow driven mode, with VPX bus technology and multi-core DSP. Multiple boards with different functions are employed in conjunction in the signal processing platform.Four parts as follows are divided to describe the design of the new type of radar signal processing platform:In the first part, the selection of the system bus is researched. As the result, VPX is selected and applied after contrasting with traditional bus such as CPCI. Slot profiles, backplane profiles and board profiles that are specified by VITA is analyzed. Open VPX standard is improved, so as to adapt the new signal processing platform more. Boards employed in this new platform are also introduced briefly in this part.In the second part, the bus protocol on VPX data plane is researched. Rapid IO is selected and applied to be the bus protocol on VPX data plane in the system, after contrasting with multiple kinds of traditional parallel bus. Layering style, packet structure and transmission mode of Rapid IO are described in detail in this part. The method of building and configuring Rapid IO module on FPGA and DSP is explained in detail. As the Rapid IO switch chip on the signal processing board, TSI578, which is produced by IDT, is selected. Finally, the method of select and configure Rapid IO switch chip and that to build rout tables is introduced.In the third part, the bus protocol on VPX control plane is researched. PCIe is selected and applied to be the bus protocol on VPX control plane in the system to achieve transmission of control signals from motherboard to any other boards. Layering style of PCIe and the method of building and configuring PCIe module on FPGA and DSP are described in detail in this part. As PCIe switch chip on the signal processing board,PEX8648, which is produced by PLX, is selected after contrasting with many other switch chips. Finally, the method of select and that to configure the switch chip on motherboard is introduced.In the forth part, the method of control this system platform with data flow is researched. On the signal processing platform, the style of data flow instead of that of traditional single signal is applied to achieve synchronization among boards. In order to that, all information is embedded in the header of the data frame. Configure information of these data and synchronization signal can be obtained by parsing the header. The method of process data even in the absence of any one board in the signal processing platform is also introduced in this part.