A Study Of High Performance CMOS Power Management Unit

In recent years, with the rapid development of mobile communication technology, the power management chip market is becoming one of focus attention in electronics. power management unit, as an important part of mobile electronic devices to provide the suitable and efficient power supply for the function modules, has a great influence on not only the stability and reliability of electronic devices, but also the performance of the whole electronic systems. Due to the functional variation of different electronic devices and function modules, the design requirements of the supply voltage, noise, stability and efficiency have been developed. Therefore, the power supply chip with single modulation cannot meet the needs any more, and integration has been the important characterstic in power management unit design. Power management unit with multi-channel can supply many function modules with accurate and efficient power source, and the variety and quantity of the supply channel can be determined by the system requerments of the electronic devices to optimize the circuit design.Based on SMIC 0.35 μm CMOS 2P2 M process, this thesis presents a 5-CH power management unit, including one low dropout linear regulator and four synchronous PWM mode switch mode power supplies, and the output voltages can be set by using the appropriate peripheral device. These four switching powers are two step-down DC/DC converter, one step-up DC/DC converter, and one step-up/step-down DC/DC converter. Due to the lack of space, this thesis only take the Buck mode for instance to introduce the switching powers. In this thesis, according to the principle of linear regulator and switching power, the function modules were analyzed from the functions of the chip in the system circuit design. For the logic and functions of system circuit, all main function modules in circuit were detailed. The LDO has a wide input voltage range, 90 d B high PSRR, and low quiescent current of 160 u A; and low dropout voltage is 0.25 V when the load current is 0.5A. The improvement on the structure of error amplifier achieves the capability of 1A output current limitation. The Buck DC/DC converter with a fixed 1MHz clock frequency, peak current mode PWM modulation and synchronous rectification, has small output voltage ripples less than 1%, small size, low power consumption and better linear regulation less than 0.5%; the conversion efficiency is up to 91.2%. A high-performance current detection circuit, combining slope compensation circuit, has been applied in the Buck converter to complete thecurrent sampling process. In order to improve the system stability, Miller compensation, resulting in a left half-plane zero voltage loop pole, is applied in the power supply circuits to compensate for the loop system. In addition, the power management unit integrated precision band gap reference, under voltage lockout circuit, and current limitation circuit, over temperature protection circuit to ensure system security and stability work.The simulation of the whole chip and its sub-block circuits, and layout design have been accomplished by using the software tools of Cadence. The results of the simulation show that the electrical characteristics of the sub-block circuits meet the design specigication. The area of the whole PMU chip is 4.6mm2(1900?m×2400?m). The chip had been taped out, and the test results show that the chip may meet the design requirements.