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The Design Of Digital Control Buck DC-DC Circuit With Fast Dynamic Voltage Scaling

Posted on:2020-04-04Degree:MasterType:Thesis
Country:ChinaCandidate:W Y ChenFull Text:PDF
GTID:2428330620956371Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Low-power System on Chip(SoC)needs the function of Dynamic Voltage Scaling(DVS)on its Power Management IC(PMIC).The digital control is gradually replacing traditional analog control as a research hotspot of such power chips because it is flexible,more precision,and its reference adjustment is simple.However,digitally controlled DVS has not yet achieved a good balance in terms of regulation speed and stability,and most require additional inductor current sampling,which increases cost.In this thesis,a digitally controlled Buck DC-DC circuit with fast dynamic voltage regulation is designed.Firstly,the basic principles of the designed circuit are introduced from the aspects of loop analysis,DVS up-regulation and DVS down-regulation.Then the following work is carried out:(1)The main topology transfer function is derived by using the state space averaging method,and the principle and physical meaning of the Proportion Integral Differential(PID)compensation algorithm are derived.(2)The smooth transition algorithm for dynamic and stability state is designed,which enables the system to switch from dynamic to steady state quickly and smoothly.(3)The DVS up-regulation algorithm is designed,including transition phase,prediction phase,approximation phase and inductor current callback phase,achieving fast dynamic voltage scaling with no overshoot.(4)The DVS down-regulation algorithm is designed,including the transition phase,the zero-crossing detection phase,the prediction phase,and the inductor current callback phase,to achieve a fast dynamic voltage scaling without undershoot.Finally,according to the designed circuit,the Matlab-Simulink simulation platform is built to achieve algorithm-level and RTL-level simulation verification.The device and circuit parameters are determined according to the simulation verification results and application scenarios.On the FPGA-based prototype,the control circuit proposed in this thesis is tested and verified.The measured results show that the Buck DC-DC circuit with fast dynamic voltage regulation can achieve voltage scaling within 10 A full load range with input voltage of 12 V or 5V.The peak efficiency is 91%.It is able to achieve a fast and smooth transition during dynamic and steady state and effectively improve the DVS performance of the circuit.The DVS up-regulation speed reaches 40?s/V,FOM(rate/output capacitance)is about 0.0943s/(F·V),and the overshoot is nearly 0 during DVS up-regulation.The DVS down-regulation speed reaches 260?s/V under 2A load condition,FOM is about 0.61 s/(F·V),and the undershoot is nearly 0 during the DVS down process.
Keywords/Search Tags:DVS, overshoot and undershoot, Dynamic steady-state transition, Buck DC-DC, PMIC, Low Power Consumption
PDF Full Text Request
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