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Study On Multi-Screen Display System Based On ARM+FPGA

Posted on:2015-01-14Degree:MasterType:Thesis
Country:ChinaCandidate:J Y SuFull Text:PDF
GTID:2308330464468737Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the rapid development of electronic technology, the range of the camera image information acquired is also growing. As a result of the limiting of the display size, it is difficult to display a oversized image in a single displayer. Therefore, this paper put forward a multi-screen image display system with ARM+FPGA, which expands the size of the image that a displayer can accomplish.The multi-screen image display system can divide an oversized image into 4 parts and display it through 4 different monitors. This system consists of two parts: ARM and FPGA. As a coprocessor ARM reads image data through USB interface. FPGA is the main processor, receiving the image data from ARM and then saving the image data up into DDR2. After which FPGA puts the image data road into four roads according the external control signal, and then displays in 4 monitors through Camera Link interface.In this paper, we complete the design of the multi-screen display system’s hardware and software, focusing on the method of FPGA on U disk read-write. This paper puts forward the hardware construction of ARM+FPGA, which use fewer FPGA resources and relatively simpler way to achieve a high speed of U disk reading and writing. For the image processing circuit, top-down design approach was adopted, dividing the FPGA image processing circuit into image input/output module, DDR2 read-write module, Camera Link image buffer module, serial module and I2 interface module. The circuit uses VHDL hardware description language to realize the function of each module, and uses Modelsim to test the function. Finally, in order to verify the error rate of image transfer, a hardware testing platform was specially constructed, to read the Camera Link output data back to the U disk through ARM, and then compare the difference between the original image file and read back file on the PC, making the error rate of data transmission reach the design specification of 0.This system makes full use of the respective advantages of ARM and FPGA, greatly improving the performance and processing speed of the system. The speed of FPGA receiving image data is 2.5MB/s, and the speed of image data put out of signal roadreaches 120MB/s.With simple structure, high processing speed, high extrenal cache capacity and high reliability, the performance of this system has been up to standard.
Keywords/Search Tags:Multi-screen display, FPGA, ARM, USB2.0, Camera Link port
PDF Full Text Request
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