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Research On Charge Trapping Memory’s Characteristics:Based On The First Principle

Posted on:2016-03-05Degree:MasterType:Thesis
Country:ChinaCandidate:J Y WangFull Text:PDF
GTID:2308330461990506Subject:Microelectronics and Solid State Electronics
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With repaid development of science and technology, we need superior electronic products. It will improve the development of semiconductor memories. And with the improvement of the level of integration, the traditional complementary metal-oxide-semiconductor (CMOS) device can’t meet the development of memories integrated. In the last century, the floating gate non-volatile Flash memory has been greatly developed, mainly reason is that Flash memory has a lower cost, less power consumption and a large memory capacity, etc. and the most important is that the non-volatile Flash memory and traditional CMOS is compatible. However, with the development of the integrated level, Flash memory’s development has been greatly restricted, because of the contradictory between device size and the reliable of Flash memory. For resolve the problem, research the next generation memory have significant. The charge trapping memory as next generation memory, and high-k material be used as trapping layer and block layer, it is important for reduce the device size, so the problem were resolved. And due to the separation of storage characteristics, it will improve the storage characteristic of CTM.Recently, for improving the CTM’s character, many researchers have done a lot of research. Si3N4 and HfO2 as high-k material be widely used as CTM trapping layer material, it’s beneficial for improving the CTM’s characteristics. In this work, we use the VASP software based on the first-principles theory to do research related to structure optimization and calculation. Then, in combination with some data processing methods, we obtained the results. The result of this work can offer a theoretical guide to improve the performance of CTM devices. This work will be composed of four parts as described below:Chapter 1 will give an introduction to the development of the memory, characteristic parameters, and the structure of CTM. The P/E and storage mechanisms of CTM will also be introduced. The rest of the chapter will give the study method of this work.In chapter 2, the P/E speed of CTM using HfO2 as trapping layer will be introduced. We will analyze the microscopic structure of the material used as trapping layer so as to understand its microscopic characteristics, some of which will be related to macroscopic characteristics of CTM such as current, voltage, and so on. The microscopic properties that can affect the macroscopic properties of CTM will be investigated in order that the characteristics of CTM could be improved by controlling the microscopic properties of trapping layer. To do all that, band offset, charge trapping energy, and charge trapping density will be calculated from the models that contain Vo3 (threefold-coordinated O vacancy), Vo4 (fourfold-coordinated O vacancy), VHf (Hf vacancy), and Io(interstitial O). respectively. The band offset represents the difficulty in tunneling into the trapping layer for charge carries. The charge trapping energy describes the speed at which the carries will be caught. the charge trapping density shows the probability that charge carries are trapped. By analyzing the calculated dates, we will identify the speeds for different defects so as to pick out the fast one. With the help of study from this chapter, we will know the effects on the program speed of CTM. And this result will provide a guide in theory for improving the program speed of CTM.Chapter 3 will introduce the over-erase (OE) phenomenon in CTM. Two objects will be introduced, Si3N4 and HfO2, respectively. We will compare microscopic phenomena for two objects after P/E operations. We will obtain the cause for OE in CTM when using Si3N4 as trapping layer. In this chapter, we firstly modeled Vo in HfO2 and VN in Si3N4, respectively, by calculating formation energy. Then,We calculated the energy changes after P/E cycle, Bader charger, difference charge density, trapping energy, and DOS for two models, respectively. The calculated results show that the change in the number of electrons in Si3N4 was found after P/E cycle, and electrons reduced in comparison to that prior to P/E operation. But results didn’t report the phenomenon in HfO2. In the end, by comparing the calculated dates, we concluded that the cause for OE is due to the fact that the constrained force added to charges by atoms in Si3N4 became weak. Meanwhile, in this chapter, we also eliminated the OE phenomenon by substitution of atoms related to OE aiming at enhancing the constrained force. The methods we used are composed of interaction energy, Bader charge after P/E cycle, difference charge density, and DOS. With the help of these methods, we proved that improving the constrained force of charges could avoid OE in CTM when using Si3N4 as trapping layer and the reliability of CTM could be improved.In chapter 4, the summary of this work will be given and the research significance will be stated as well. In addition, we will also give a brief description for the further study in future.
Keywords/Search Tags:Charge trapping memories, Over-erase, HfO2, Si3N4, The first principle
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