Characterization And Analysis Of Devices Based On SOI High Voltage Technology

This topic according to the sub-subject of the "02 special projects-a great scale integrated circuit manufacturing technology and complete sets of process"-"Device characterization and analysis based on SOI technology platform" requirement to complete the project, the SOI 600V LDNMOS is determined as a main research object.With the increasing demand for 600V and above 600V high voltage device in the integrated circuit design process, the existing devices designing technology is not able to meet this demand. As the core device of power integrated circuits,600V SOI LDMOS has attracted much attention in the field of semiconductors. At present, relative to the bulk silicon high-voltage device, above 600V SOI high voltage devices are rare in the domestic.This paper designs a new SOI 600V LDNMOS device, which adopts circular structure with a low doping drain lateral drift region that ion concentration linear change by linear gradient doping technology, and is supplemented by trench oxide layer structure in order to improve the source-drain breakdown voltage of the device. Through SILVACO TCAD tools for lateral drift region doping concentration, electric field distribution, drift region length and thickness effects of different parameters on the breakdown voltage of high-voltage device and P-well area on the threshold voltage of the impact of the simulation and optimization, the optimal determination of the values of the parameters. By using ATHENA tool, we carried out a simulation of the device structure and process steps, then used ATLAS tools to simulate the electrical characteristics of the device. As a result, we obtained the transfer characteristic curve, output characteristics curve and the breakdown voltage curves. This shows LDNMOS threshold voltage is 2.4V, the saturation current value is 48mA and the breakdown voltage value is 620V. The result of device simulation fully demonstrates that the device structural design is reasonable and puts forward the target and direction of further optimization of device structure and process steps.We designed SOI 600V LDNMOS device layout for different channel widths (30 μm,60 μm,80 μm,120μm,150 μm) based on the 0.5 u m SOI high voltage Design Rule, and used the SOI wafer of Shanghai Xin’ao company (3 μm buried oxide layer and the 1.5 μm layer silicon) to conduct experiment. Through the On-wafer test, we analyzed the turn-on characteristics, output characteristics and breakdown characteristics of each device, obtaining the value of Gm and specific on-resistance value Ron. By comparing the actual test data with the TCAD simulation data, we find that the device has very good characteristics parameters, the breakdown voltage of devices with five different channel widths is more than 600V, and the specific on-resistance values are about 18 Ω· mm2. Not only achieve the purpose to enhance the high-voltage breakdown voltage, while reducing the feature on-resistance values within a reasonable range. This result indicates that design of high voltage devices which have the advantages of traditional thin film SOI high voltage device, at the same time its novel structure, high degree of pressure, layout area is reduced, reducing parasitics, provides a higher reliability of the new high-voltage devices.