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Interface Properties And Structural Simulation Of High-k Gate Dielectric (In)GaAs-based MOS Devices

Posted on:2015-05-01Degree:MasterType:Thesis
Country:ChinaCandidate:S Y ZhuFull Text:PDF
GTID:2308330452955689Subject:Materials Physics and Chemistry
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As the MOSFET device scaling to22nm and beyond, conventional SiO2/Sisystem has reached its physical limits and been unable to meet the demand ofhigh-speed, high-performance Complementary metal-oxide-semiconductor (CMOS)integrated circuits. III-V compound semiconductor materials attract enormousattention due to its high intrinsic electron mobility, high breakdown field and lowerpower consumption. However, its native oxides, such as Ga2O3and As2O3, cause theinterface instability and pin the fermi level of GaAs device. To address the aboveissue, we fabricated GaAs MOS device with surface pretreatments including SiNxpassivation and Al2O3or ZnO as interface passivision layer in order to improve itselectrical and interfacial properties. As for the InGaAs MOSFET, its electricalproperties are influenced by the structure. We used the Silvaco TCAD software tosimulate the structure of InGaAs MOSFET in order to get the best structuralparameters. In this thesis, we mainly investigated the process and structuralsimulation of (In) GaAs MOS devices with high-k gate dielectric.GaAs metal-oxide-semiconductor (MOS) capacitor with HfO2as gate dielectricand silicon nitride (SiNx) as interface layer (IL) is fabricated. Experimental resultsshow that the sample with SiNxas IL has an improved capacitance-voltage (C-V)characteristics, lower leakage current density and lower interface-state densitycompared to other samples with N2or NH3plasma pretreatment. The sample withSiNxIL annealed at600oC exhibits best electrical properties. Additionally, theinterfacial and electrical properties of GaAs MOS devices with HfTiO gate dielectrichave been investigated by inserting a thin Al2O3or ZnO film as interface passivationlayer (IPL) between HfTiO and GaAs. Experimental results show that Al2O3and ZnOused as IPL can effectively suppress the growth of a low-k interfacial layer on theGaAs surface. XPS analysis improve that the ZnO IPL can’t block the out-diffusion of As and large mounts of As-O bonds were existed between the interface of HfTiO andGaAs surface. But, a larger reduction of Ga-O and As-O bonds is achieved for thesample with Al2O3IPL, indicating the effective passivation role of Al2O3to the GaAssurface.Three structures of high-k gate dielectric InGaAs MOSFETs are investigated byusing Silvaco software, i.e. buffer structure, sidewall structure and basic structure.Simulation results show that the buffer structure has the best electrical properties,followed by the sidewall structure. For InGaAs MOSFETs with buffer structure,further analysis shows that the channel thickness has a huge influence on the stableelectrical properties.
Keywords/Search Tags:GaAs MOS devices, high-k dielectric, surface pretreatment, structural simulation
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