Research Of Network Simulator For Photonic Networks-on-Chip

Many-core system-on-chip is becoming an attractive platform for high performance applications. Network-on-chip (NoC) has emerged as an enabling platform for connecting hundreds of cores on a single chip. The traditional metal interconnects have gradually been unable to catch up with the pace of Moore’s Law because of several physical limits, resulting in high latency, low bandwidth and high-power consumption-that is the so-called "electronic bottleneck". In contrast, with high bandwidth, high density, low-power consumptions and so on, optical interconnects overcome the limitations of traditional metal interconnects. So it is of great significance to study how to improve the overall performance of the many-core system-on-chip combined with optical interconnects.Silicon photonics has emerged as a promising technology platform for on-chip or off-chip interconnection network. As photonic network-on-chip (PNoC) is an attractive option to break the electronic bottleneck, its architectures based on such devices are developed by many different groups. However, photonics technology itself remains immature and uncertain. A network simulator which can model and analyze the performance of PNoC is urgently needed. Due to the inherent interactions and tradeoffs between the electronic and photonic components, such network simulator should contain improved accurate parameterized electronic and photonic devices libraries and also have the ability to simulate the PNoC. Besides, such network simulator should provide design space exploration of PNoC where network configurations are easily changed in order to explore the synthesize performances of different architectures.In this paper, we introduce LioeSim, a network simulator for PNoCs analysis that incorporates an accurate parameterized all-round photonic device library. We develop the accurate parameterized photonic device library that contains all-round photonic devices for PNoC. The electrical interface circuitries are also modeled in photonic devices and dynamic performances can be captured.The router architecture design is based on the function pipeline and the messasge queue inside the LioeSim ensures the overall system. We also describe how to construct mesh-based HNoCs with the fundamental mesh-based topology inside LioeSim. The clustered mesh-based HNoCs, two typical HNoCs with optical bus and HNoC with optical mesh network are carefully explained.To demonstrate the diverse capabilities of LioeSim, we perform some case studies of clustered mesh-based HNoCs, two typical HNoCs with optical bus and HNoC with optical mesh network by illustrating the comparisons with hop counts, latency, power consumptions, and efficiency.