Research On Neural Network Algorithm Based On Silicon-based Photonic Chip

Since the beginning of the 21 st century,artificial intelligence technology has been greatly developed,and deep learning algorithms play a significant role as the core driving force of artificial intelligence.With the continuous update and iteration of deep learning algorithm,the demand for hardware computing power and bandwidth is also increasing day by day.Special hardware devices have emerged to accelerate deep learning algorithms,reducing the energy consumption of hardware devices while improving computing power.However,as the technological size of chips gradually approaches the physical limit and Moore's law gradually becomes invalid in recent years,the traditional electronic integration technology is unable to meet the needs of future massive data computing capabilities.As a medium for transmitting signals,optical signals have many characteristics such as high parallelism,low power consumption,low latency,which plays an important role in the current information age.It is important to solve the bottleneck of electronic technology by replacing electricity with light for calculation and data processing.This essay compares and analyzes the current advanced optical computing models.Based on the photoelectric hybrid computing system with siliconbased photonic computing chip,this paper explores and analyzes its realization principle and calculation mode,and designs the neural network algorithm for silicon-based photonic computing chip.The main research work is as follows:1.A convolutional layer algorithm that matches the structure of the photonic computing chip is designed,and a convolution optimization algorithm is proposed to solve the rate mismatch of photoelectric interface.At the same time,on the basis of the convolution algorithm,the fully connected layer is transformed into a matrix dimension transform Convolution operation can perform convolution operation and fully connected layer operation of any dimension on the photonic computing chip with limited operation scale.2.The electric domain pooling layer algorithm that supports average pooling and maximum pooling is designed,so that the non-linear calculations such as pooling operation and activation function in the convolutional neural network algorithm can be realized by the FPGA(Field Programmable Gate Array)chip in the photoelectric hybrid computing system.It solves the problem that the photonic computing chip has a single calculation mode and cannot bear the nonlinear calculation in the convolutional neural network.3.An algorithm simulation system based on FPGA platform is designed to test and evaluate the neural network algorithm for photonic computing chips.In the simulation experiment,the reasoning process of the convolutional neural network structure transplanted by using the ZYNQ development board.The designed algorithm was used to generate the Verilog-based IP core through the high level synthesis tool,which realizes the identification of the handwritten numbers.The results show that the neural network algorithm for photonic computing chip is superior to the conventional convolutional neural network algorithm in detection rate.It also shows that the reasoning process of using the photonic computing chip to implement the convolutional neural network algorithm has high practicability and flexibility.