Design And Research On Panoramic Camera Image Acquisition And Compression System

The panoramic camera system can be used in widespread scopes, such as panoramic monitoring, environment detection, intelligent robot, and digital city. It is a new area with a valuable research in theory and practical aspect. Panoramic camera system can get360°omni-directional image video information and a high-photorealistic panorama virtual realization can be formed after processing images with software.The panoramic camera system of image data acquisition and compression is mainly about high-speed image information collection and compression. At present, most of panoramic cameras and devices are realized by image information gathering with special camera lens or by one camera turning around, but it is rare to see the devices which can get panoramic high-resolution images simultaneously. According to these deficiencies, hardware system which meets the hardware requirements of panoramic camera system is proposed based on a comprehensive view of domestic and foreign developments in panoramic acquisition system in this thesis. The main contributions of this dissertation are listed as follows.(1) The development work of the panoramic camera hardware system of image data acquisition and compression is completed.Analysis the advantages and disadvantages of current panoramic hardware system and propose the design requirement and requirement analysis for the panoramic camera system of image data acquisition and compression.(2) Acquisition part is an industrial camera array collection. A new scheme of panoramic controller based on DSP+FPGA is proposed, which can finish the function of image acquisition, data integrating, image preprocessing and storing of the large real-time data. In order to obtain high-resolution images, the industrial camera is selected as an important acquisition part, on which secondary development can be done.(3) The image data cache module is designed based on FPGA with Verilog hardware description language, which includes the functions as follows:triggering multi-channel camera at the same time based on I2C bus, real-time data caching based on SDRAM, implementing format conversion of the image data from RGB to YCrCb color space and so on.(4) As for software part, the system software is compiled and debugged, and joint debugging of overall functions is achieved.The data compression module based on TMS320DM642is designed. As for hardware part, SDRAM extended circuit, system power circuit and related FPGA and DSP communication peripheral circuits are designed.(5) Realize the image compression algorithm of JPEG in DSP. According to real-time performance of the JPEG algorithm, this thesis realizes and optimizes the image compression algorithm based on Loeffler algorithm on hardware.