Design And Realization On Bit Error Test Function Of MSAP Equipment

With the increasing competition in the telecommunications market, prompting thetelecom operators are increasingly concerned about the quality of the network. The accessnetwork system is directly facing the customer, whose quality is directly impact on thereputation of a telecom operator customers and market share. In recent years, in ChinaTelecom, China Unicom and China Mobile network testing, require built-in bit error ratetest function in MSAP system. Bit error rate test is also essential in communicationengineering acceptance measurement equipment.This article introduced the analysis of the BER test principle, and made a detailedintroduction to hardware and software design of the BER test system respectively. In thehardware circuit design part of the system, the paper used the FPGA as the core of thedesign of the data processing, designed the power supply, clock and interface busperipheral circuit, in the FPGA internal sequence, designed the received sequencesynchronization and error countscircuit. In this article, the system used VHDL as aprogramming language to complement all logic design; in the data control part of thesystem, this used the industry widely used51-series MCU SST89E/V516RD2chip as themicroprocessor, designed the SNMP protocol to communicate with the networkmanagement center, received various instructions of the BER test system viamicroprocessor INTEL bus and FPGA communication, get the number of err bit in FPGA,and calculated the error bit rate in the internal microcontroller. In addition,SST89E/V516RD2chip can loopback device port to convinencely user test communicationline performance remotely. The BER test system generated three kinds of pseudo-randomcode sequence length pattern optional manual transmission error, and FPGA chip resourcesoverall control of the main function.The spirit of economical and practical design principles of security and stability, andcan meet the needs of the users of communication lines, the bit error rate test usingultra-large-scale integrated chip and microcontroller foreign joint design, all efficient low-power chip and single-supply operation. Design a suitable the MSAP access systemcost low, stable performance BER test system. According to the actual used conditionsindicated, the system is stable, reliable, high practicality and stability.There are three kids of innovation and practicality of the subject as belows:1. Products designed to meet the network operator’s network testing requirements;2. Designed a new clock extraction and bit synchronization, a draw for the design ofthe follow-up of similar products;3. Product remotely error test convenient engineers test line communication qualityand fault location, saving a lot of manpower and material resources.