Design And Simulation Optimization Of The Semi-Superiunction VDMOS

The power VDMOS (Vertical Double-diffused MOS) is a unipolar conduction device which is controlled by gate voltage. It has advantages of simple control, high frequency, fast turn-off velocity and so on. But the on resistance Ron is proportional to the breakdown voltage (BV) to the power of2.5, which limits its application in high voltage field. By adopting charge compensation method to introduce transverse electric field in the drift region, Super Junction (SJ) VDMOS breaks the limit line of silicon. However, besides the technical difficulty for fabricating SJ-VDMOS, SJ-VDMOS has poor reverse recovery characteristics. Compared with SJ-VDMOS, semi-SJ-VDMOS is not only easy to fabricate but also has higher overall performance. Therefore, it is significant to study on the mechanisms and design methods of the semi-SJ-VDMOS.This thesis has done in-depth research on semi-SJ-VDMOS design and simulation optimization method. A device structure meeting design indexes is obtained and based on that device, an improved new device structure is proposed. The main contents of this dissertation include the following points:(1) Theoretical research on the working principle of Semi-SJ-VDMOS. Through theoretical analysis and calculation, the relationship between the cell and terminal’s structure parameter and some electrical properties, such as the breakdown voltage, threshold voltage, on resistance and so on, is obtained. What’s more, the mutual connection and restriction relations between performance indexes are acquired.(2) Research on the design and optimization method of the Semi-SJ-VDMOS. By using the process routine of combining epitaxy technology and excavated filling technology, a complete process flow for Semi-SJ-VDMOS is designed. In addition, an optimized simulation of the device’s structure parameters, process parameters and electrical parameters including on resistance, breakdown voltage, turn-off time, reverse conduction voltage and reverse recovery characteristics and so on, is practiced through applying the TCAD software, TSUPREM4and MEDICI.(3) Based on the in-depth research on the traditional Semi-SJ-VDMOS, a new Semi-SJ-VDMOS with P type-Bottom Assist Layer (P-BAL) is proposed and simulation of the new structure is completed. P-BAL introduces upward electric field in the bottom assist layer, which changes the original distribution of the electric field. Therefore, the breakdown voltage of the new structure has been further improved on the condition that other electrical properties keep unchanged.In this dissertation, through theoretical analysis and calculation, an optimized Semi-SJ-VDMOS is finally designed. The main performance indexes include that: breakdown voltage is greater than900V, specific on resistance is smaller. Meanwhile, a new Semi-SJ-VDMOS with P-BAL is proposed. The research of this dissertation has a certain guidance and reference on the design of Semi-SJ-VDMOS.