Design And Research Of Receive System In Fieldbus MAU Chip

The Medium Attachment Unit(MAU) is an interface circuit in bus powered foundationfieldbus devices, it is use for achieving the conversion between the logic signal and physicalsignal. MAU chip is the large scale mixed-sigal IC to achieve above functions, only a smallnumber of foreign companies can provide it. MAU design technology is one of the fieldbusinstruments core technology, with the continuous development of industrial technology, thedeveloped MAU chip has become more significance.This paper describes a domestic process designed MAU chip, and which focused on thedesign and implementation of the receive circuit. Combining with the down-top and top-downdesign, start with the down-top analysis of the foreign chip and the signal transmission qualityrequirements in the communication protocol standard IEC61158-2, then using the domesticprocess to design the chip. Receive circuit consists of switched capacitor filter and comparator,the main function is to receive signals in the frequency range between7.8KHz-39KHz frombus and convert it to the logic signal recognized by the internal digital circuit, whilesuppressing interference and noise.The subject’s technical difficulties is using the new process to replace the originalprocess, the switched capacitor’s Z transforms and the comparator’s comparison point biasvoltage need to adjust. The receive scope of the original chip is1KHz-44.3KHz, the newscope is up to7.8KHz-40KHz after the optimization, close to the protocol requirements.First, carries out circuit extraction by the Chiplogic Analyzer software and finishing forfunctional modules by Cadence software, then conduct an analysis of the circuit, include theswitch capacitor filter, the comparator, the operational amplifier, the bias circuit andnon-overlap clock. The switch capacitor filter is the key part of the circuit, should pay moreattention on it. After the whole analysis of the circuit, use BCD process of Huahong nec0.35um to replace the original process. The whole circuit is individually simulated andverified by the tool, and it meets the fieldbus communication protocol IEC61158-2. Finally,complete the layout design, through the DRC and LVS rules.