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The Design And Implementation Of The Onu Device For High-Speed TDM-Pon System

Posted on:2015-02-21Degree:MasterType:Thesis
Country:ChinaCandidate:Z G WangFull Text:PDF
GTID:2298330467463507Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
10G EPON has become one of the mainstream solution to increase the access network bandwidth by the industry recognized. It is needed to have a flexible, programmable platform of PON system to further research all kinds of problems of10G EPON and validate new mechanisms and functions, such as depth business identification, QoS assurance, etc. But the software and hardware of10G EPON commercial ASIC chip has been solidified, and it cannot satisfy the special requirement of the research. So it is necessary to design a PON system based on FPGA, with independent intellectual property rights. In addition, with the rapid development of the future all kinds of network business, the demand of access network bandwidth will be increased and the coverage will be further expanded, the optical access system with the rate of40Gbps, the coverage of40km has become the inevitable trend. In this paper, two ONU equipments of PON system have been designed and developed to implement a10G EPON platform based on FPGA and conform to the goals of the next generation PON with large capacity, long distance, wide coverage. The main research and development effort is as following:(1) The design and implementation of10G EPON ONU①Participate in the overall system design of ONU device for10G EPON system, set the technical indicators to meet the international standards of IEEE802.3av and support10G PON interfaces, FE/GE user interfaces based on the requirements analysis, and complete the division and design of functional modules.②Complete the circuit designs and make requirements of PCB design, including the design of10G PON interface, FPGA, the converting circuit of SGMII to GMII and embedded system. ③finish debug tests for function modules in board level and combined system test, including the interface debugging of XSBI/SFP+, FE/GE, SGMII to GMII and performance test in system level. The results show that the scheme of10G EPON complys with the design requirements.(2) The design and implementation of40Gbps TDM-PON ONU①Participate in the overall system design and module design of ONU. It is an asymmetric system supporting the branching ratio of1:32and the maximum transmission distance of40km.②Complete the circuit designs, including the design of10GE,40G optical module, FPGA, clock, and the interfaces of XAUI, SFI-5and XFI.③Set the requirements of PCB design. The PCB of the final experiment board is as many as18layers, about24000pins. And the daughter board includes10PCB layers, about3000pins.④Take out debug test for functional module in board level, including the interface debugging of user side and PON side, performance test in up direction and down direction. The debugging results show the rationality and feasibility of the ONU scheme.
Keywords/Search Tags:10G EPON, 40G Coherent PON, ONU, PCBHardware Design
PDF Full Text Request
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