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Hardware Design And Implementation Of EPON ONU Based On FPGA

Posted on:2012-09-21Degree:MasterType:Thesis
Country:ChinaCandidate:F ZhangFull Text:PDF
GTID:2218330338962886Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the development of telecommunication industry, telecommunications network, broadcasting television network and computer network are integrating into each other. The three-network fusion has become an inevitable trend of network development. Ethernet passive optical network (EPON), which is based on Ethernet, is the important technical means to realize access with high bandwidth and multi-service. At present, the development of EPON equipment is still not mature enough, so it is still the focus of research.As the client equipment of EPON system, ONU provides services for small enterprises, public institution users and residential users. And it can multiplex and decompose different users' services. In the uplink direction, services of kinds of families' terminals are transmitted in the same transmission medium. And in the downlink direction, all the services are decomposed and then transmitted to the corresponding terminals through different interfaces.Based on Virtex-5 FPGA of Xilinx, this paper implements the hardware design of ONU SOPC system using ISE and EDK development tools. The design realizes the uplink and downlink data access, multi-point MAC control protocol and Ethernet switch function according to the standard of IEEE802.3ah.Firstly, this paper introduces the components of EPON system, including the principle of data transmission of upstream and downstream, MPCP. Secondly, it gives the deign scheme of ONU hardware system and introduces the important parts of the SOPC system. The design and implementation of ONU MAC controller and switch modules are introduced in detail. The simulation and verification results of these modules are also given in this paper.The layers above PMD and switch are both implemented on FPGA, which can simplify the design of PCB, reduce cost, and also be suitable for ASIC design. FEC is implemented in this design. The coding and decoding process of FEC are improved. The improved procedures have the advantages of saving resources and improving efficiency, compared with the process defined in IEEE802.3ah.Finally, the design of SOPC system is realized in XC5VLX50T chip of Xilinx. And the system is simulated by ModelSim6.5. As is shown in the simulation results, the design can realize the function of ONU. Utilization of resources and rate can both satisfy the requirements.
Keywords/Search Tags:EPON, ONU, SOPC, MPCP, Switch
PDF Full Text Request
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