Research On Dual Band And High Linearity Low Noise Amplifier With Reuse Of Tunable Active Inductors

The use of on-chip spiral inductor in design of Dual Band Low Noise Amplifier（DB-LNA) integrated circuit, not only takes up most of the chip area, but also limitsthe circuit performance due to the disadvantages of untunability of inductance andlow quality factor.MOSFET-based active inductors(AIs) with small area, ultra wide band, high Qand tunability are investigated, and are applied to design of dual DB LNA, and isreused. On the one hand, the chip area is saved greatly, on the other hand, impedancematching, noise matching, high gain and high linearity can be realized by tuning thebias voltage of active inductors.First, CMOS-source-follower-based novel active inductor with high widebandwidth, high quality and tunablity is investigated. The source followerconfiguration is chosen as basic topology of our novel AI. Then a transmission line,active feedback bias circuit and negative impedance compensation network are addedinto it. The transmission line effectively increases the inductance value, the activefeedback bias provides appropriate bias condition for CMOS source follower, thenegative resistance compensation network generates negative resistance to reduce thereal loss of input impedance of active inductor. The novel active inductor is validatedby Agilent ADS and the layout is designed by Cadence Virtuoso. The results showthat the tuning ranges of equivalent inductance value are1.98-2.89nH (at2.4GHz) and0.36-6.82nH (at5.2GHz), which depend on external bias voltage, the minimum Qvalue reaches1002.9, the area is only6586um2. All the results demonstrate that thenovel active inductor has high inductance values, wide tunable range, high qualityfactor, high operation frequency and small area.Secondly, a2.4GHz/5.2GHz Dual-Band high linearity low noise amplifier withreuse of active inductors is researched.2.4GHz LNA adopts folder cascode structureto enhance the gain,5.2GHz LNA chooses CG structure to improve the operatingfrequency. The source active inductor degradation technology, gate active inductordegradation technology, active inductor shunt peaking technology and feed-forwarddifferential superposition linearity improvement technology are employed to achieveimpedance matching, noise matching, bandwidth extension, linearity improvementrespectively. Furthermore, the reuse of source degradation active inductor and shunt peaking active inductor at folder cascode structure and CG structure reduces thenumbers of active inductor, hence reduces the chip area greatly. The scheme of the useof tunable inductors can be used to adjust change of impedance matching, gain andbandwidth of LNAs due to process and package. Based on TSMC0.18m CMOSprocess, the proposed DB LNA with reuse of active inductor is verified by AgilentADS. The results show that DB-LNA operated at2.4GHz has S21of35dB, NF offrom4.42to4.59dB, IIP3of0dBm, P-1dB of-14dBm, Mu_s of over1.57; theDB-LNA operated at5.2GHz has S21of34dB, NF of from2.74to2.75dB. IIP3of-5dBm, P-1dB of-9dBm, Mu_s of over3.28.