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The Design And Of Implementation Of Security SOC Chip EMMC Master Interface

Posted on:2015-02-22Degree:MasterType:Thesis
Country:ChinaCandidate:J CaoFull Text:PDF
GTID:2298330431485994Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The SOC technology is triggering an unprecedented change in IC field. Manyfactors are considered into SOC design, such as reliability and low powerconsumption, etc. SOC design can help to solve the problems which need to besolved in IC design instead of in the system at past. So SOC development willbecome the mainstream and tendency of the VLSI development.With the development of information technology, people pay more attention toinformation security. Due to the advantages of higher performance and higher security,security chip replaces the encryption software gradually. After SOC technologybecomes the mainstream in IC design, security SOC chip also has developed rapidly.A variety of common security algorithms can be integrated into Security SOC chip, inorder to meet the needs of different applications of encryption. To achieve the securestorage of information, some high-speed and security external interfaces are used inthe chip. Therefore, the security storage chip has become a major development inapplications of security chip. It can be said that the applications are closely linked toour daily lives.Nowadays eMMC (embedded Multimedia Card) chip which is based on the SDcard has been the main embedded storage device in the market. The main applicationsof eMMC chip are for portable devices. With the advantages of large capacity, bursttransmission and high security, eMMC chip enjoys great popularity. eMMC chipfollows the standard eMMC protocol, which is the international standardcommunication protocol, and it’s dominated by Samsung. The host with interfacesfollowed this protocol can visit eMMC chip.SOC verification is an important part of the design, and it takes most time of theentire SOC design. Only can be improved the success rate of TAP-OUT after strictverification. Massive function verification are considered for RTL level design. Afterthe layout design, there is a strict timing verification. In addition, FPGA verificationis also considered in this design. These verifications ensure the validity of the design. The innovative achievements of research in this paper show as follow:To begin with, the eMMC communication protocol is implemented on securitySOC chip for the first time. On the basis of the full research in eMMC4.5protocol,linked the characteristics and applications of the SOC chip and eMMC chip, thispaper gives the strict analysis on functions of hardware and software and achieveshigher coordination on the performance and flexibility.What’s more, implement the design of cross clock domains on the hardware. Thedesigns of cross clock for system clock and communication clock help to improve thespeed of data transmission and can be transplantable to other SOC chips easily.Last but not least, achieve a flexible and comprehensive error detectionmechanism according to the co-design of hardware and software. There are manydifferent errors and timeouts which maybe appear in communication, because of thedifferences on design standards and manufacturing process of different eMMCdevices. To achieve a reasonable error detection mechanism, this interface can beflexibly configured according to the specific needs in the application.
Keywords/Search Tags:SOC chip, eMMC Master interface, verification, FPGA
PDF Full Text Request
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