Best Polarity Searching For Ternary FPRM Logic Circuit Area

In recent years, with the development of higher scale and integration of integrated circuits, more andmore transistors are integrated in a single chip. This makes chip area become a problem that can not beignored. Multiple valued logic circuit has the features of strong one-way information carrying ability thatmake the system double the transmitting data speed in one clock cycle. In order to solve the integratedcircuit chip area and interconnect increasing problems, it provides effective solutions. Ternary logic circuitis a multi-valued logic circuit with the smallest radix and easy to implement, representative of multiplevalued logic circuit. In fact, Reed-Muller (RM) logic based on the modulo algebra not only can representany of ternary logic function, but also compared with the traditional lattice algebraic sum of products formcircuit, RM logic circuits have more advantages in power, area and speed etc. Fixed polarity Reed-Muller(FPRM) is a common logical regular expression with different levels of expression complexity at differentpolarities in RM logic, and thus determines the different mapping circuit area. Meanwhile, intelligentalgorithms have certain advantages in solving combinatorial optimization and complexity computationalproblems, so intelligent algorithms are applied to searching the best polarity of ternary FPRM circuit areain this thesis. In view of this, based on the research of ternary logic RM relevant content and intelligentalgorithms, the main contents of this thesis are as following:1. Analysis and improvement of intelligent algorithms based on polarity searching: by studyinggenetic algorithm and polarity conversion strategies, the appropriate ternary FPRM logic circuitoptimization coding program and fitness computation are determined. On the basis of it, combined with theselection, crossover and mutation operators, and to research the improved genetic algorithm, theconvergence of problem solving is more stronger, and the best polarity searching for ternary FPRM logiccircuit area is easy to realized;2. Ternary FPRM polarity conversion: by researching on the characteristics of ternary FPRM logicfunction expansion and modulo algebra and using multiple valued tabular technique, the expansionscoefficient conversions about the ternary lattice algebra min-term expansion to ternary FPRM logicexpansion at some polarity and the FPRM expansions at different polarities are realized;3. Best polarity searching for ternary FPRM logic circuit area based on exhaustive algorithm:according to gray code traversal sequence and polarity conversion strategies and combined with ternaryFPRM circuit area estimation model value, the best polarity searching for ternary FPRM logic circuit areais easy to realized;4. Best polarity searching for ternary FPRM logic circuit area based on intelligent algorithms:According to polarity conversion strategies and combined with ternary FPRM circuit area estimation modelvalue, the best polarity searching for ternary FPRM logic circuit area is easy to realized by using geneticalgorithm and improved algorithm;The proposed algorithms are to optimize ternary FPRM circuit area as a starting point in this thesis,and all program is written in C programming language. Through the MCNC Benchmark circuit tests, theresults show that the algorithms have advantages in ternary FPRM circuit area optimization.