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Research On Dynamic Resources Sharing In Three Dimensional Processors

Posted on:2013-12-31Degree:MasterType:Thesis
Country:ChinaCandidate:H X HeFull Text:PDF
GTID:2298330422473783Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
As the semiconductor technology has stepped into the deep submicron andnanometer level, technology scaling gradually approaches the physical limit. The wayby enhancing the frequency to improve the performance of processor has stalled andmicroprocessor architecture research and implementation have transferred to multi-coreand many-core architectures. Multi-core and many-core architectures do not solve theproblems include power wall, memory wall, increasing interconnect delays but makethem even worse, which hinders the development of microprocessor.In a3D processor, dies may be stacked on top of each other by using threedimensional integrated circuit (3D IC) technology. Therefore the3D processor can getmore resources with low cost and integrate more memory to address the memory wallproblem. Through silicon vias (TSVs) with low latency and high bandwidth connectstacked dies and they can substitute the global interconnects in nanominiaturization.Load balancing problem exits not only in traditional two dimensionalmultiprocessors and multi-computers but also in multi-core processors. One computingresource may become a bottleneck in a core during the execution of complex programs,while other cores may be in idle states or wait for operands’ returns at the same timewith their corresponding computing resources being free.Dynamical sharing resources between the cores in two dimensional processors arefacing some issues include coarse shared resources, long interconnect delay, poorscalability. In order to overcome these shortcomings, this paper describes a new3Dprocessor architecture called3DDRS what allows sharing computing resources andbalancing the power consumption and heat. What is more,3DDRS architecture can beextended to share resources between multiple stacked layers and multi-cores.With the consistency of the multi-task executing models,3DDRS-SIM based onSMTSIM can simulate the principle of sharing resources of3DDRS and it can beextended to simulate3DDRS of multiple stacked layers.3DDRS-SIM is used tosimulate the performance of3DDRS running computing density programs. The finalresults indicate that the single-threaded performance of3DDRS averagely speeds up at23%and the total performance achieves12%.Resources sharing technology between multiple stacked layers in3D processorscan dynamically adapt the application’s demand for resources and enhance performanceof multi-processor composed of simple cores, which is a good alternative for3Dprocessor in the future.
Keywords/Search Tags:multi-core, TSV, 3D processor, resources sharing technology, performance simulator
PDF Full Text Request
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