Design Of Medical Electronic Endoscope Imaging Processing System Based On SOC

Biomedical Electronics solves problems in biomedicine by using electronic technology; it can’t develope without the support of electronic technology especially in the medical equipment and medical imaging field. CT, MRI and PET play a key role in diagnosis with human bodies, but it is not ideal for them to check certain parts of the body, some special organs such as intestinal, stomach and cavity is hard to diagnose. Endoscopes rise in respond to the proper time and conditions. Its feature of cheap and minimally invasive makes itself popular. Also human body can recover soon after simple care. Domestic endoscopes stay at circumstances of low resolution and poor image quality, also, the price of the medical electronic endoscope imported is very high.This thesis mainly studies the design of a high resolution of the electronic endoscope system. Firstly it summarizes the research design of medical electronic endoscope topic significance and current development at home and abroad. Secondly, the thesis studies and designs a high resolution image endoscope system based on the current demand of medical electrotonic endoscope, and implements the system based on SOC device produced by Xilinx Company. This device is a FPGA embedded with dual Cortex-A9 cores, which can run to 800 MHz. It can achieve the acquisition, processing and transmission of high resolution image primely.The system uses a high resolution CMOS imaging sensor to be instead of endoscopes camera. The FPGA part of SOC device is responsible for collecting high-speed data produced by imaging sensor, and then the ARM part controls the system, stores the image data in the DDR3 and transfers the data by using the internet. Data quantity of high resolution video image is more than 30M bytes per second and it has a high requirement of transfer and storage. This article compares different video compression algorithms and combines the feature of medical endoscopes camera system. This article focuses on MJPEG compression algorithms and uses hardware to realize the algorithms and then used in the embedded system. The whole system is within the control of ARM hard core, via AXI bus to complete the data communication between PL and PS in the SOC device. The final result of the system debugging is to transfer the compressed images to computer to do other video processing through the ethemet.