Research And Design Of Linear Phase - Locked Loop Based On

The great improvement of the integrated circuits technology in recent years promote the development of the wireless communications technology. The wireless communication system consists of three circuit modules, the RF transceiver, the signal processing module and the interface module, among which the RF transceiver is the basis and the key module of the wireless communication system, whose performance is very important to the performance of the whole system. According to the above, the fully integrated, low-cost wireless RF transceiver is becoming the tendency in the future. The phase-lock loop is the most important part of the RF transceiver and the core circuit of the RF transceiver, whose performance is very important to the performance of the RF transceiver, and also the greatest difficulty to design a the fully integrated wireless RF transceiver.The applications of the phase-lock loop in the digital system, the modulation-demodulation of the analog signals and the RF transceiver are introduced at first in this paper, especially that in the frequency synthesizer. The charge pump phase-lock loop which is the popular structure of the fractional-n frequency synthesizer is introduced in this paper as follows: the basic operation principle of the charge pump phase-lock loop is described at first, then all modules of the charge pump phase-lock loop are analyzed. For each module such as the phase detector, the charge pump, the loop filter, voltage-controlled oscillator and the frequency divider, the commonly used circuits are analyzed and compared to figure out which one is the best or how to improve the circuits in hand. The influence of the nonlinearity of the voltage-controlled oscillator’s coarse turning to the performances of the charge pump phase-lock loop is introduced.To solve the nonlinearity problems of the charge pump phase-lock loop, the solutions in hands are considered comprehensively. After the circuits of every module is ensured, the analysis to the loop of the charge pump phase-lock loop is carried on with the concrete data, and after then the demands of the tuning characteristic of the voltage-controlled oscillator are clear. A novel capacitor bank structure is proposed to implement a wide-band CMOS voltage-controlled oscillator(VCO) with linearized coarse turning characteristics. This new capacitor bank structure is clearly different from that of the conventional voltage-controlled oscillator, which is made up of only a group of varactors, a resistance array and a current source array. The resistance array and the current source array are controlled by four-channel digital signals which provides a group of bias voltage on varactors that can be equivalent to a capacitor array. In other words, the values of capacitor can be set accurately and conveniently to adjust the step frequency for the linearized coarse turning. The resistance array adjusts the turning gain(Kvco) by different digital signals. For the fine turning, an analog control voltage is added to the bias voltage by the technology of current superposition. Simulation results have shown that the turning gain of the voltage-controlled oscillator is almost the same with the different digital signals, so the proposed voltage-controlled oscillator has a better coarse turning characteristic compared to the conventional voltage-controlled oscillator.Base on the above, the 5.8GHz phase-lock loop integrated in a single chip is designed and simulated on CSMC CMOS 0.18μm technology with six layers of metal, and the voltage-controlled oscillator was taped out.