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Study Of CMOS LC VCO

Posted on:2013-06-10Degree:MasterType:Thesis
Country:ChinaCandidate:L P ZhangFull Text:PDF
GTID:2248330371462022Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
The explosive growth in wireless communications and the development of deep submicronCMOS technology have driven people to research and produce wireless transceivers at low-cost, low-power and more-standards. Voltage controlled oscillator is an important component of wirelesstransceivers, its phase noise, power consumption and tuning gain have great effect on the performanceof the whole system. At the same time, as the rapid development of our business communication, therequirements of RF front-end are higher and higher. Therefore, in order to adapt to the complexapplication environment, how to design high performance VCO is very important, which also hasbecome an important issue of wireless RF integrated circuit (RFIC) design. This paper designs voltagecontrolled oscillator respectively applied in 2.4 GHz and Q band based on the CMOS technology.First, the background and current research situation of oscillator are introduced simply. The basictheory of the oscillator and the performance index are presented. At the same time, several commonoscillator topologies are listed for LC VCO, and the analysis and comparison to their characteristicshave been done out.Second, we focus on analysis of the VCO phase noise and discuss the creation mechanism indepth. Several widely used phase noise theory are analyzed and studied systematically, and someeffective measures of reducing phase noise are put forward through the analysis of the theory.At last, from the perspective of applications, we design a 2~2.8GHz broadband VCO based on theSMIC 0.18μm CMOS process and a 43.5~45.5GHz narrowband VCO based on IBM 0.13μm CMOSprocess. The former uses complementary cross-coupled symmetrical structure, realizes a widefrequency tuning range and low tuned gain through the switch capacitance array, and reaches a lowphase noise through a series of really effective noise reduction technology, so it achieves a betteroverall performance. The simulation results show that the working voltage is 1.8V, the oscillatorfrequency is 2.4GHz, tuning range is 33.3%, the tuning gain is less than 100 MHz/V in the whole band,power consumption is 8.3mW, phase noise is -124.5dBc/Hz@1MHz, andFOM Treaches193.5.Considering the complexity of the circuit design at the Q band, the latter uses the cross-coupled NMOSstructure. Through the reasonable device parameter design and the compromise of output amplitude,phase noise, power consumption, it finally achieves a good circuit performance. At the same time, wealso have accumulated rich circuit design experience. The simulation results show that the working voltage is 1.2V, the oscillator frequency is 44.5GHz, output amplitude is 350mV, phase noise is -97.93dBc/Hz@1MHz. The monte carlo simulation shows that the probability of center frequency fallingwithin 2G band is more than 80 percent.
Keywords/Search Tags:CMOS Process, Voltage Controlled Oscillator, Switched-capacitor array, monte carlo
PDF Full Text Request
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