Research On Low - Frequency Noise Of Small - Sized High - K Gate Dielectric

Low-frequency noise(LFN), especially for 1/f noise, widely exists in various semiconductor devices. Compared with electrical parameter detection, LFN detection is more sensitive to potential defects in semiconductor devices. According to the research on the methods of reliability detection, we found that under a certain stress, electrical parameter didn’t change obviously, but noise parameter had evidently changed. This is because the low-frequency noise has stronger detection capabilities for defect in semiconductor devices than electric parameters. Therefore, there are more and more researchers interested in LFN for reliability characterization.MOS devices continue to reduce the size, according to the principle of scaling, the thickness of the Si O2 insulating oxide layers also needs to continue decreasing. But when the MOS device’ feature size reaches deep sub-micron meter, and even nanoscale, the thickness of Si O2 layer will exceed its physical limits(~ 1.2nm). With the researches on high-k materials, we found that using high-k materials as a replacement of Si O2 for gate dielectric material, the MOS device’s gate leakage would be improved. However, the high-k materials itself have a higher bulk trap density and interface traps density due to lattice mismatch, which bring a challenge for device reliability. The 1/f low-frequency noise, to some extent, is able to reflect those parameters associated with device reliability characteristics. Therefore, the focus of this paper is to study the 1/f low-frequency noise model of MOS device with the new gate stack structure, and analyze noise characteristics. Hence, we made the following work:(1) To the studies for Coulomb scattering about MOSFETs channel carriers, we simply considered the interaction between the interfacial oxide traps and channel carriers previously. However, this paper summarized a large number of experimental data, and found that high-k layers traps and interface traps will also introduce strong remote Coulomb scattering, which influence mobility obviously. Conventional Si-based MOS devices’ gate dielectric was a native oxide layer deposited directly on the substrate, so the surface roughness scattering is not very obvious, but the new gate dielectric interface is very rough, which introduces strong roughness scattering. Therefore, when we calculated mobility, the influence of remote Coulomb scattering and surface roughness scattering have been considered.(2) Classic unified noise model is very advanced when it is applied to the conventional MOS devices’ 1/f noise characterization. But for the scaled MOFETs with high-k gate dielectric, there is a large error between simulation results and experimental data. In this paper, we have corrected the mobility fluctuation item in noise power spectral density. The new noise model included the quantum mechanical effects in scaled devices.(3) Computing model parameters: Coulomb scattering coefficient α and surface roughness scattering coefficient β. The results found that the two scattering coefficient and the Coulomb scattering coefficient in unified model have equal magnitude, proving our ideas for modeling on the basic framework of unified noise model is correct.(4) In the last of the paper, the automated noise test method that based on virtual instrument was been studied, and the noise test program was also been designed. The dependence of the mobility characteristics and low-frequency noise characteristics of high-k gate dielectric MOSFETs on thickness of interface layer and high-k layer, is been expected to study.