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High-speed Data Transmission System Design Andresearch Based On RapidIO

Posted on:2016-10-11Degree:MasterType:Thesis
Country:ChinaCandidate:W YuanFull Text:PDF
GTID:2272330461492744Subject:Control Science and Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of China’s aerospace industry,the task of aerospace electronic devices bearing is greatly increasing, system performance demand of data transfer has become much more strictly, We need to adopt a more robust interconnect teconology to support transmission capacity. Rapid IO serial bus technology is the world’s first international standard for embedded system interconnect, the communication rate is range from 1.25 Gbps to 60 Gbps,therefore,the design of high-speed data transmission systems based on Rapid IO has important practical value.The paper is based on a research projects I participated in a research institute of aerospace.To meet the demand of high-speed data transmission in aerospace electronic systems, on the basis of depth study on the Rapid IO technology I designed Rapid IO-based high-speed data transmission platform.I studied the Rapid IO protocol and analysed three layer architecture specification: physical layer, transport layer, logic layer,then,I designed the logic layer and transport layer module, serial physical layer module, two modules were focused on the implementation process of Rapid IO protocol.I designed Rapid IO-based high-speed data transmission hardware platform,including the FPGA circuit, power circuit, clock circuit and interface circuit,then I explained the schematic design notes. in addition, I finished the high-speed PCB board need analysis and physical design.I simulated the design of the platform with simulation software and completed transmission lines, crosstalk, signal board-level simulation of high-speed signal. Schematic simulation proved the feasibility of principles of design, board-level simulation verified the reasonableness of the PCB design. Rapid IO for FPGA communication simulation show that the system could meet the high-speed data transmission demand.This paper studied the Rapid IO technology deeply, focusing on the completion of Rapid IO protocol and the high-speed data transmission platform design of meetting signal integrity requirements.Rapid IO technology breakthrough the transmission bottleneck of traditional bus technology, hardware design firstly did signal integrity analysis, compared with traditional PCB design,it?s much more rigorous and reliable, effectively saving production costs. The test results show that the system design meet high-speed data transfer requirements.
Keywords/Search Tags:Rapid IO, FPGA, high speed circuit, data transmission
PDF Full Text Request
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