Design And Implementation Of FPGA Based High Speed Data Transmission System Used On Computed Tomography

Medical computed tomography (CT) scanner is a well-used medical imaging device that produces tomographic images based on computer-processed and X-rays technology. CT includes several key sub-systems, such as data acquisition, data transmission, computer reconstruction systems etc. As the leap development of CT technology, the scanning accuracy and speed has been improved. As a result, in real time scan, the data throughput between DAS and computer system has been blowing up. This thesis is to design a high speed data transmission system for CT which requires high data rate with low bit error rate and unidirectional transmission.The quantity of X-ray detector is the key parameter to divide the CT market. In1990s, there is only single slice detector in CT; after20years, engineers have developed high performance CT scanner with over64slices detectors. Limited by CT physical structure, the high speed data transmission path is expensive. To make the CT more affordable, the CT data path is always designed to be unidirectional. Considering the high bit error rate caused by CT slip-ring, CT designers implement data correction scheme. This thesis.is based on data transmission system design for a high-end,64slice CT which require over350MB/S real time throughput data rate.The author has work and finished below tasks:1) Finish the PWA design and SI simulation. The PWA is based on the Arria GX FPGA from Altera, Corp. The data path is built by high speed transceiver, data integrity checking, data caching and DMA transfer between PCIE and memory.2) Finish the FPGA design, simulation and debugging. Implement the Reed Solomon etc. forward error correction method, controller interface to QDRII, integrated PCI-Express IP cores.3) Finish function verification test, system integration test, and the reliability test.