Font Size: a A A

FPGA Design And Implementation Of Key Technology For Phased Array Ultrasound Imaging

Posted on:2013-06-18Degree:MasterType:Thesis
Country:ChinaCandidate:X H ShenFull Text:PDF
GTID:2272330422479887Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Due to the low detection complexity, less restrictive in testing, with the advantage of visualimaging and higher detection resolution, ultrasonic phased array (UPA) imaging detection technologyhas become a hot topic of the international field of NDT in recent years. Based on several keyperformance indicators of UPA, This paper made a further study of emission sound beam performanceand receive acoustic beam forming, completed FPGA design and verification of a32-channel UPAimaging system, and represent the initial imaging results. The main work is as follows:1. Analyzed the phased delay precision, studies have shown that fine delay is conducive to theenhancement of the system performance. Studied a sound field modeling method which based on thecoherent superposition principle, and completed the simulation of the probe of the system.2. Based on phased array sector scan, dynamic focusing receiving imaging, Studied a receivingbeam-forming algorism based on the orthogonal envelope detector, its performance is significantlybetter than the traditional one with lower implementation complexity and resource consumption.3. Put forward a system design of UPA and chip selection program of FPGA, including FPGAinterface and algorithm module division. Studied a virtual synthetic array imaging method, it does notrequire a complex delay control, but obtains the same beam-forming properties. An improved virtualfocus imaging method is proposed, which aims to solve the contradictions of temporal and spatialresolution.4. Completed FPGA design high-speed interface and digital beam-forming of32-channel UPAimaging system, including low complexity implementation of2.5ns delay accuracy,600Mbps serialLVDS interface design, low resource consumption design of orthogonal envelope detector delay offsetalgorithm, reliable clock gating of ARM and interface design of DMA. Joint debugging with ARMsubsystem, and represent the initial imaging results.Above key technical research and FPGA implementation also provide a reference design of UPAimaging system.
Keywords/Search Tags:Ultrasonic Phased Array, Beam characteristic, Beam Forming, Virtual focus imaging, high-speed interface design, FPGA
PDF Full Text Request
Related items