Research On Design Technology Of Ultrasonic Phased Array Imaging System

Ultrasonic phased array(UPA) technology has the advantages of intuitive and reliable detection results,and high efficiency of detection,so it is a research hotspot in the field of nondestructive testing.In this paper,a multi-channel and extensible UPA imaging system is designed and it is based on modularized design.Transmit and receive beamforming algorithm is implemented and verified in the hardware system.The main work is listed as follows:1.Studied the basic principle of UPA transmission and receiving,and three key performance indexes of ultrasonic imaging with their main influencing factors.The influence of the transmission delay precision on the beamforming is analyzed.Studied the application and performance effect of dynamic focusing,coded excition and orthogonal envelope detector in UPA.2.The hardware design scheme of multi-channel UPA imaging system is proposed.The system took the modular design, which mainly consists of control board,transmitting board,receiving board and base board.The function module can be expanded by adding corresponding board.HV7350 is used to generate high voltage pulse excitation and AD9273 is used as the analog front end of ultrasonic echo receiving,which improve the integration of the system;USB2.0 interface is used to complete the data communication between the hardware system and the PC;The logic control and data processing of each module are accomplished adopting FPGA.3.The implementation and verification of transmit beamforming and receive beamforming are accomplished in FPGA,including the transmitter module with 2.5ns delay precision,LVDS interface design based on SelectIO resources, the matching filter module based on the resource reuse, the dynamic focusing delay parameter calculation module and the linear interpolation module.4.Accomplished the schematic,PCB design,welding and debugging of each module and they can work normally after testing.Accomplished the debugging of 600 Mbps serial LVDS interface between AD9273 and FPGA.Accomplished the debugging of the communication between the control board and PC through the USB2.0 interface.Board level testing of UPA imaging algorithm is accomplished in hardware system.