Xilinx Virtex-4 Verification System Design And Realization

As the rapid expansion of SOC chip design scale, the verification work in the chip design has become an important link. FPGA verification method used its development cycle short and easy to modify the design, not only can save a lot of time to verify, but also improve the reliability of verification work. Now large-capacity high-speed the emergence of the FPGA, in-stream before the establishment of a cost-effective FPGA verification system to shorten SOC has become an important method to verify the time.This thesis research direction is the use of XILINX VIRTEX-4 FPGA SOC chip design verification platform, the main work of the following three aspects:1: System design, set design adopted the programmed. According to the requirements of verification platform, the FPGA models screening XINLINX XC4VLX100 after determining that the use of chips, chosen at the same time the external memory chips, high-speed devices such as sockets and power.2: Hardware design, to XC4VLX100-based chip design features. The design includes external power modules, download circuit modules, NAND FLAH and SRAM memory modules. Verification platform design JTAG interface, for code switch and LCD, and the surplus FPGA connected to the high-speed pin socket.3: Verification platform debugging and analysis. On each module for testing, while the use of NAND FLASH Verilog language and SRAM memory modules prepared by the testing procedures, procedures for simulation after downloaded to the FPGA FLSAH and SRAM functions to be tested.The design of the test the various functional modules is working, and delivery to the FPGA chip verification. In the chip verification, FPGA development board is working, good chip to complete the verification work.