Design And Implementation Of QPSK Demodulation And Ethernet Transmission Based On ZedBoard

QPSK modulation and coherent demodulation is the important technology in modern communication field,and is widely used in the satellite and mobile communications.It has many marked excellences,such as higher frequency spectrum, strongger anti-interference capability.Based on the principle of QPSK digital demodulation and Xilinx embedded development technology research, this thesis implements the design of the ZedBoard QPSK digital demodulation and Ethernet transmission.The design mainly make uses of the feature of heterogeneous multi-core processor,which main chip (Zynq-7000AP SoC on ZedBoard platform)integrate a dual-core ARM(?) CortexTM-A9MPCoreTM and28nm7series FPGA in a single device. Completing carrier70MHz QPSK signal acquisition and coherent demodulation in the Programmable logic of the Zynq,and realizing baseband transmission using RTP streaming media transmission protocol after digital demodulation on the ARM processor.The thesis research content mainly includes the following aspects.Studying configuration and startup of the Xilinx Zynq platform, transplant the Linux operating system in the ZedBoard, and build the cross compiler tool chain of corresponding Linux versions.This thesis successful transplantate the jrtplib-3.7.1library and jthread-1.2.1library used in real-time transmission of RTP protocol on ZedBoard platforrm, and design the system flow of Hardware-Software Co-design, it provides proper preparation for the implementation of the design.Combined with the basic principle of QPSK digital demodulation, this thesis designed the system block diagram of QPSK digital demodulation and Ethernet transmission based on ZedBoard, and chosen the AD9467FMC card of ADI company as digital signal acquisition board for actual needs.The IP CORE used for acquisition control is compiled. This thesis completed the simulation simulation of demodulation algorithm in MATLAB/Simulink, converted algorithm simulation to the Verilog HDL by using Xilinx System Generator for DSP. Finally encapsulated demodulation algorithm into IP core in Xilinx embedded system(EDK project), linked the algorithm IP core and the acquisition control IP core as well as the Zynq ARM processor, compiled the corresponding driver, build the hardware platform of the whole design.For the condition of QPSK modulating signal of carrier70MHz and bandwidth10MHz,this thesis build the Costas loop digital demodulation model in System Generator,and detailed introduced the design and parameter settings of numerical control oscillator (NCO), loop filter (LF) and low-pass filter.Designed the flow of real-time transmission using RTP protocol under Linux system,and wrote the application program of RTP real-time transmission under Linux system. Finally, completed the test of functionaliy and performance for70MHz IF signal acquisition using AD card under the control of PS end of Zynq, and real-time transmission using RTP protocol.Test the performance of Costas loop coherent demodulation by setting deferent frequency offset between QPSK signal carrier frequency and signal frequency generated by local NCO, and given the simulation test result.The test result show that design of the QPSK digital demodulation and Ethernet transmission scheme based on ZedBoard are correctness and feasibility.