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Design Of Interface Circuit For EnDat2.2Based On FPGA And ARM

Posted on:2014-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:D H SunFull Text:PDF
GTID:2268330428959142Subject:Optical Engineering
Abstract/Summary:PDF Full Text Request
The absolute optical encoder as a digital position detection device, is widely usedin modern industry, defense and other areas of measurement and control technology.Data transmission of the absolute encoder needs to follow certain serial protocol.Many domestic and foreign encoder companies have developed a respectivecommunication protocols for their own absolute encoder. Among them,the EnDat2.2protocol launched by Germany Heidenhain company is favored by the world’s majormanufacturers of CNC because of its high-speed, high intelligence, high reliabilityand low cost. Its rich functionality and versatility as well as proactive security designconcept makes EnDat2.2encoder interfaces become the industry standard protocols.In order to meet the numerical control system for EnDat2.2interface systemrequirements and replace manufacturers expensive interface board, this paper uses theFPGA and ARM9to design dual encoder interface circuits. The circuit is applied andtested on the LC181grating.First, this paper describes working principle and data transmission of incrementaland absolute encoders. By analyzing and comparing the advantages and disadvantagesof both encoders, it comes to the conclusion that absolute encoder has higherreliability of data transmission for the high-speed, high-precision servo system. Thenthis article analyses in detail EnDat2.2interface protocols in the hardwarecircuit,electrical standards, data frame format and so on. In the FPGA’s software development environment Quartus ii11.0, a dual EnDat2.2encoder interface circuit isdesigned with Verilog HDL language, simulated and debugged in the timing on theModelSim. This article uses S3C2440ARM9as a control device, a4.7-inchtouchscreen as the human-computer interaction interfaces,portes linux operatingsystem,completes the design of FPGA device drivers and the development of userprogram. Finally, through experimentation and debugging, positions value of theencoder are displayed in real time. Baud rate of serial port reaches2Mb/s.50framesper second can be transmitted.
Keywords/Search Tags:EnDat2.2, encoder, incremental, absolute, FPGA, S3C2440ARM9, Linux
PDF Full Text Request
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