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Study And Implementation On Transmission-bus Of Absolute Encoder

Posted on:2012-05-28Degree:MasterType:Thesis
Country:ChinaCandidate:L XiaFull Text:PDF
GTID:2218330362455838Subject:Mechanical and electrical engineering
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With respect to the requirements of precision and the speed of the feedback position to the high speed and high precision CNC system are becoming increasing high, high-precision absolute encoder applications are being used widespread. The data of absolute encoder is usually outputted by special interface and protocol, so the date transmitted of absolute encoder is very important.Although,some domestic enterprises have developed absolute encoder, they don't have the selfdeveloped interface and protocol, they all use the foreign standard. On the one hand, the customers who use the absolute encoder must pay more because of the restriction of intellectual property, patent and special decoding ASIC. On the other hand, the interface and protocol themselves have some disadvantages such as low-transmitting-clock, low anti-interference ability, and transmission delay, especially when the cable is long, so the use of the interface and protocol is limited. Here the thesis developes a HSI(Hight-speed Serial Interface) bus of absolute encoder.The main contents of the thesis as follows.According to the"Open Systems Interconnection Basic Reference Model", HSI bus is optimized and expounded into three layers, physical layer, link layer and application layer. Scheduling mechanism and fault tolerance mechanism of the transmission-bus are researchedFor the RS485 interface that is popularly used for foreign absolute encoder protocol has the drawbacks,such as low-speed, low-reliability, so a fieldbus interface that is based on Ethernet technology applied for HSI. THSI interface can effectively solve the data transfer delay, and greatly improve the reliability. In allusion to characteristics of Ethernet, a tranmission protocol and reliability security mechanism of HSI is put forward.The field programmable gate array (FPGA) and its programming environment QuartusII and its programming language VHDL has been used for HSI bus protocol which is designed by the method of the top-down modular, the key modules of the HSI is simulated and tesed.Three test platforms of HSI bus protocol has been built, and the experimental procedures of HSI bus protocol are given according to one of those, the reliability of the whole system is verified and tested . At the end of the thesis ,HSI and other foreign absolute encoder interfaceand protocol are compared.
Keywords/Search Tags:absolute encoder, interface, protocol, FPGA
PDF Full Text Request
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