A Dual Slope ADC Design For CMOS Image Sensor

People have been concerned about the development of the image sensor since themiddle of last century. CCD device was widely used in various fields，so it domain themarket of image sensor for a long time. With the development of technology. Peoplelook forward higher requirements on image sensor design. By the drawbacks, such asthe model of conversion and power, CCD device can not meet the people on the useof variety of needs. As time flying, CMOS image sensor coming. It gets the favour ofpeople by the advantage of high integration and lower power dissipation. The readoutcircuit of CIS develops to the sophisticated research. I will design a analog to digitalconversion based on the active pixel sensor.In the traditional ramp ADC, there are twice sample and conversion during thecolumn readout, and then processing the data for storage and output. On the paper ofDLL single slope ADC. Because the DLL can make the accurate delay cells, so thechip can work at the16times system clock. It made it is possible for ramp ADC usinglower clock. In this design, I will give up the Fix Pattern Noise by Correlated DoubleSampling. Based on the range of input signals, I changed the traditional ramp into two,which are different integration times. And then, the sampling signals will be comparewith the two signals; the model of comparator is regeneration comparator, so, whenthe comparator begin to work, the outputs of comparator are high and low level, thatfrequency is likely the system clock; the up-down counter will be count the outputs ofcomparator, by the counter, I can get the final data from the tow conversion. The finaldata present the signal of image sensor. At last, all the data could export through theshift registers by LVDS.The article design a dual slope ADC for CMOS image sensor with0.18umCMOS process. The readout style is column model for CMOS image sensor, so theywill be sharing one ADC for a row pixel. As the pixel size applied by the factory is8umX8um, the width of one column ADC must be smaller than8um. The total area ofthe whole circuit is8umX600um. Compared with other types CMOS image sensor readout circuit, this design can save more area for chip.By the simulation of the whole chip, this design can applied on the CMOS imagesensor, and reach the design target.