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Design And Implementation Of Video Image Encryption System Based On3DES Algorithm IP Core

Posted on:2014-04-27Degree:MasterType:Thesis
Country:ChinaCandidate:M Y LiFull Text:PDF
GTID:2268330425491634Subject:Electronic and communication engineering
Abstract/Summary:PDF Full Text Request
With the high-speed development of network and information, the development of network technology and application is more and more widely, the network information security problem also more and more remarkable, and become one of the problems that cannot be ignored. In modern society, the issues of information privacy or security have been paid more and more attention. Video information is one of main carriers of modern information. How to protect personal privacy or the government department important information with encryption algorithm when it is transmitting is becoming an important research subject.With the development of programmable logic devices, the application of FPGA provides a new solution for high-speed digital video image information processing, and the system based on FPGA is now becoming one of the central research subjects. Making the best use of parallelism and flexibility of FPGA improve the video image processing speed essentially, and it not only reduces costs but also achieves real-time transmission of large video image data with satisfying effect.The video image encryption system in this paper is based on DE2-70platform of Altera. The FPGA used in the design is EP2C70of Cyclone II series. The whole system is designed with collaborative hardware and software methods. Hardware:Based on the requirement analysis of the system, complete a customized processor NIOS II with the design and implementation of each hardware modules in the system. The hardware module is mainly composed of the image input processing module, image preprocessing cache module, image encryption processing module, and image display output processing module. In the image encryption processing module,3DES algorithm IP core was designed and implemented, by using pipeling way high-speed encryption processing of video images, and using Quartus II integrated development tools and Modelsim SE5.8simulation tools of3DES encryption IP core simulation verification. Software:using C language programming in the Nios II IDE environment, for the whole video image encryption system to video image read, encryption, decryption and control. Finally, download the entire system to the DE2-70on the development platform, the video image encryption effect evaluation.After testing, on the DE2-70development platform, the video encryption system has reached the desired effect, relative to the software encryption algorithm; the system greatly improves the processing speed of encryption. The IP core based on3DES algorithm implementation, in the form of soft core is easy to migrate to the needed safety system. System realizes the required functions, and has good reliability and portability, takes up less resource, lower cost and has wide application prospect.
Keywords/Search Tags:FPGA, video image, encryption, decryption
PDF Full Text Request
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