The Design And Implementation Of Embedded Flash Accelerator

With the popularity of intelligent device and IoT (Internet of Things), the MCU (Micro Control Unit) embedding Flash is more and more widely used in the field of industrial controlling and consumer electronics. To implement the controlling of embedded Flash in these low-power an low-cost application environments and make the data fetching faster meanwhile, an eFlash accelerator based on2-way set-associative cache is designed in this paper, which is applicable to low-power and low-cost32bit embedded CPU such as ARM M0/M3and C-SKY CK802/CK803.To be compatible with different types of eFlash, an universal architecture is proposed. For different types of eFlash or the eFlash simulator which is used for FPGA emulation, only FICU (Flash Interface Control Unit) in the accelerator needs to be replaced while other modules are configurable and reused, so that both the hardware architecture and software interface of these eFlash accelerators are unified. This method of module reuse makes the development of new Flash accelerator much more efficient, and the designers can supply the FPGA emulator to customers as soon as possible to promote the software and hardware co-verification.In the ACU (Acceleration Unit) of eFlash acccelerator, some eFlash data fetching acceleration techniques based on cache are proposed and implemented. These techniques help to improve the Flash data fetching performance and keep the power consumption low.With IP-XACT standard based SoC integration techniques and CK-SoC integration platform, the eFlash accelerator is packaged and finally integrated in one SoC case successfully.