An Efficient E-Flash Accelerator Based On Hardware And Software Design

With the rapid development of the concept of smart home, wearable devices and IoT(Internet of Things), micro controller unit (MCU) is getting more and more popular. At the same time, the E-Flash is gradually becoming the most important instruction memory in the MCU chip. But compared to the processor, the E-Flash is a slow storage device which will restrict the overall performance of the MCU. So it is very important to improve the reading performance of the E-Flash.In this paper, we design an efficient E-Flash acceleration controller, which can improve the reading speed of the E-Flash by software and hardware technology. Firstly, this paper introduces the hardware design of the controller which can realize the basic function of the Flash. In the design, we realize single cycle access of the E-Flash through the optimization of the state machine and the interface signals at low frequency mode. And among the design, the low power method and testability are also considered.In order to improve the reading performance of the E-Flash, an efficient accelerator is also implemented in the controller. There are two methods in the accelerator. The pre-fetch-cache method uses the data width extension and pre-fetch technology to accelerate the access of sequence instructions, and uses the branch-buffer technology to reduce the missing penalty which is caused by the branch instruction. The cache method uses the way-predict and cache-lock technology to reduce unnecessary cache access and replace, and improve the reading performance while reducing power consumption.This paper also proposes some software optimization methods. For the cache method, according to the statistical analysis by using the gcov tools, a formula and a design flow are proposed to evaluate the code segment that should be locked. A switching mechanism is also proposed to assure that the switching of the acceleration method not only can be selected statically by configuring related registers, but also can be switched dynamically by the software flow.Finally, through a design example of a SoC chip, we prove the feasibility and practicality of the Flash acceleration controller which is proposed in this paper.