Research On Implementation Of FPGA-based FIR Digital Filter Technology

With the continuous deepening of information technology, the digital signal processingtechnology continues to develop, the filtering, as an important part of signal processing,which is critical to the whole electronic system. The FIR filter is widely used because of itslinear phase. In practical engineering applications, the FPGA has advantages over otherhardware in implementing filtering. In order to coordinate the whole system, it is essential totake speed and hardware resources consumption into account.The paper have studied the FIR filter which is implemented by the FPGA. The workdone is divided into three parts:1. The paper studied the FIR theory and three traditional design methods, analyzed eachadvantages and disadvantages and give some details in designing.2. Studied two main implementing methods which were based on multiply distributedstructure and multiply-accumulate structure. In the multiply-accumulate structure, studiedmultiplication and addition optimization techniques, including parallel structure addition、pipeline addition、Reduce Adder Graph algorithm, and studied their influence on resourcesand speed. In addition, studied the resources consumption which the depth and the number ofaddition have impact on. Of course, we gave the improved algorithm steps. In the distributedalgorithm, studied three structures, meanwhile, and studied their disadvantages andadvantages. The improved structure was based on the input feature of LUT, its input has fourpins. Finally, took a filter which has5taps as example, improved the structure further, andstudied the influence of resource and speed.3. Designed a32-order low-pass filter based on the multiply-accumulate structure and IPCore, compared the performance of both, and then through the theoretical waveformgenerated by Matlab and Quartus to confirm the algorithm, and analyzed the may sources oferror.