Research On Fault-tolerant Method For Three-dimensional Reconfigurable Array

With the rapid development of integrated circuit manufacturing process, the integration of digitalelectronic systems is increasing greatly, and the probability of failure in the life cycle is even greater.Due to the advantages of functional flexibility and short development cycle, the reconfigurablehardware has been widely used in the critical electronic systems such as aerospace. While because ofthe harsh environment and difficulty in artificial maintenance, the reliability of reconfigurable hardwareis highly demanded. Therefore, the design of fault-tolerant reconfigurable hardware which is aimed toimprove the reliability has great meaning.The self-fault-tolerant method means that the reconfigurable hardware could realize self-repairwithout the control of external controller. Existing self-fault-tolerant methods in two-dimensionalreconfigurable hardware have the difficulty in realizing re-routing and the routing congestion and delayproblems are becoming more serious, especially in the application of large-scale system, which maylead to the poor fault-tolerant ability and large time overhead. The three-dimensional array cansignificantly reduce the wire length and improve the flexibility in routing process, which provides anew idea in the design of fault-tolerant method of reconfigurable hardware.This paper takes the advantage of three-dimensional array structure in routing flexibility, andstudies the self-fault-tolerant method of three-dimensional reconfigurable array. The main work of thispaper is as follows:(1) Two-dimensional structure of the reconfigurable array usually has a low flexibility in routingmechanism, and the complexity in controlling the fault-tolerant process increases with the array scaleincreasing, so it is not suitable for the application of large-scale system. For these problems, this paperdesigns a three-dimensional reconfigurable array, and based on this structure, the functional cell andthree-dimensional switch block with fault-tolerant ability are designed. The three-dimensional switchblock is used to realize information transmission in six directions, it can not only improve the flexibilityin routing mechanism, but also have the ability of self-test and self-repair. Functional cell can realizeself-fault-tolerant, therefore, the complexity of reconfigurable process could be reduced significantlywithout using external controller.(2) This paper studies the online self-fault-tolerant method of reconfigurable hardware. Faultscan be located precisely by online distributed inputting test vectors, the test speed is fast and testmechanism is simple. In the process of fault-tolerant, a hierarchical self-repair method is used so that the reconfigurable hardware can perform the appropriate repair mechanism through different diagnosticresults. By rationally using of underlying redundance and free interconnect resources in reconfigurablearray, the utilization rate of resources and fault-tolerant rate can be fully improved.(3)This paper exemplifies4-bits parallel multiplier and4-bits adder/subtractor, which aresimulated and downloaded to FPGA board, to verify the logic function and fault-tolerant ability ofreconfigurable array. By analyzing and comparing with other reconfigurable arrays in fault-tolerantability, hardware resource overhead and fault-tolerant time, it can be shown that the method proposedin this paper improves fault-tolerant ability, reduces hardware resource overhead and time cost.