A Study Of Edge Node For OPS Based On FPGA

With the rapid development of Internet and the explosive growth of high-speed datatraffic, in today’s information society have more and more demand on exchange capacity andtransmission bandwidth of communication network. Currently, the problem which opticalnetwork is faced with is how to improve the rates of processing information at switchingnode.Optical Packet Switching (OPS) is a new type of optical switching mode. OPS is abasic way to solve the "electron bottleneck"caused by photoelectric conversion at switchingnodes and the key technology for all-optical network in the future. OPS network have manycharacteristics,such as: highly flexibility, transparent for data rate and format,easy tomanagement and reconfigurable, and it is likely to become the ideal hosting platform forall-optical network in the future. An OPS networks is composed of core nodes and the edgenodes. This thesis focus on the edge in the OPS. The main work and results as follow：(1) Assembly algorithms are easy to implement is researched.The simulation model forassembly module based on three assembly algorithm whose assembly thresholds are static isset up. The effect of assembly algorithm for assembly module has been studied from the lossof IP packet, latency throughput.Some comparison and analyze be made.The simulation resultsshow that the three fixed threshold algorithm can effectively improve the network performanceof the OPS network,and the MLMAP assembly algorithm have an advantage of the others.(2) This thesis mainly research the function of assembly module at edge node in the OPSand propose a hardware design method based on fixed length and time threshold assemblyalgorithm for assembly module. A detailed hardware design for assembly module for theedge node has been completed based on FPGA hardware implementation. Some functionsimulation has been made for assembly module. The simulation results show that theassembly module can achieve the function of assembly algorithm.(3) The simple method of hardware implementation for the Ethernet MAC controllerlayer at the edge nodes is introduced and the Ethernet MAC controller layer is designedbased on platform of Xilinx KC705development board. Based on the platform,we do someverification test. Test results show that the design realize the function of receiving data frameand meet the requirement of practical application of the Internet.