Font Size: a A A

Design Of Key Front-End Circuits For WBAN Receiver

Posted on:2014-09-04Degree:MasterType:Thesis
Country:ChinaCandidate:X O MaoFull Text:PDF
GTID:2268330422463392Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
With the constant progress of society, the development of wireless networksrequirements were proposed. In recent years, the wireless body area network (WBAN) hasemerged as a new technology for e-healthcare applications, which can achieve theshort-distance communication around the human body. Receiver design is the focus andemphasis in WBAN research. As WBAN has the requirement of power consumption, costand volume, a receiver design for WBAN is needed to promote WBAN development.As the path loss in narrow band and ultra-wideband communication is very high, thesignal at RX is very weak. The distance or impedance between the contact electrode andthe human body skin should be considered. Those questions require the receiver has highsensitivity to receive the signal. Considering the shortage of sensitivity in other WBANreceiver, this paper takes it as the goal of this study. And we choose the suitable systemand circuits’ structure to design. Our receiver can meet the communication around humanbody in2meters. At the same time, a high level of integration, low power consumption isalso required to improve the usefulness of WBAN.Based on the analysis of human body communication mechanism, we choose zero-IFreceiver as the structure of our receiver system. Analyses the performance parameters ofthis structure based on channel model, which guarantee the succeeded circuit design. Weanalyze the characteristics of body channel model, and make an overall design of receiver.Then we design the low noise amplifier and mixer as they were the most important part ofour system. As noise figure is the key point of LNA design, we choose noise-cancellingtechnique to solve this question. At the same time, we adopt dynamic current injection todecrease low-frequency noise of mixer. Finally, this paper simulates each key module inthe transceiver by using ADS, to verify the rationality of the design. In this thesis, thetransceiver fabricated with0.18m CMOS and its operating d istance is over2m. Itsenergy consumption is2nJ/b with-85dBm sensitivity,2Mb/s data rate and50dB SFDR.
Keywords/Search Tags:WBAN, HBC, low power, receiver
PDF Full Text Request
Related items