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Improvement Of Hot Carroer Injection For3.3V NMOS Of90nm Technology With T0.1Standard

Posted on:2014-03-23Degree:MasterType:Thesis
Country:ChinaCandidate:B ZhangFull Text:PDF
GTID:2268330422454393Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the development of VLSI technology, then technology of semiconductor manufacturing is becoming more and more advanced. In the promotion of Moore’s law, the number of the device is doubled every three years, the chip area increased1.5times bigger and the critical dimensions shrinks to2/3. However, in order to meet circuit integration requirements, the corresponding voltage which used to supply power is not scaled down, because the low supply voltage may induce weak compatibility between device and other circuits. As a result, the issue on reliability becomes more and more prominent due to the channel of device scale down.With keeping the supply voltage as a constant, reducing the key dimensions of the devices, thinning the gate oxide thickness, will make the electric field of device increasing either on horizontal or vertical directions, which induced the degradation of hot carrier injection becomes a prominent problem on the device reliability.Through much more analysis on the hot carrier injection of the device, we found that shallow junction technology can effectively improve the hot carrier injection effect. It is a very efficient way to improve the device hot carrier injection effect with optimizing shallow junction process, which is called LDD process, if we can’t find a new the device structure to improve the device hot carrier injection. In general, we can through optimizing implant condition and the related annealing condition to optimize the device shallow junction depth and the geometric structure, which can reduce the electric field of Drain, thus improving the hot carrier injection effect of the device.In this paper, we base on the process of90nm technology, to meet the reliability request under T0.1standard, we do more analysis for the hot carrier injection of3.3V NMOS. We study the structure of the device, analysis the process to form the device, then we found out the reason that induced the reliability of the hot carrier injection can’t meet the request under T0.1standard, is due to process issue. Base on the study of other technology, we find the improve action, and design the experiment to validate the action. Finally, we get the conclusion that we can improve the performance of hot carrier injection on device via optimizing the LDD implant and the annealing condition of the LDD process. By these actions we can get the device to meet the TO.1standard for the reliability of the hot carrier injection.
Keywords/Search Tags:Hot Carrier Injection, T0.1Standard, Shallow Junction, Lightly Doped Dosage Implant, Annealing for Lightly Doped Dosage
PDF Full Text Request
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