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Design And Implementation Of9/7Wavelet Transform Based Lifting Scheme

Posted on:2014-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:X SunFull Text:PDF
GTID:2268330422452079Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Before the advent of wavelet transform theory, Fourier transformation has been ina leading position in the field of image processing, with the development of the theoryof wavelet transform, especially after the lifting scheme method appeared, wavelettransform is widely used in image matching, image segmentation, image filtering,image compression, etc.The lifting scheme has lower computational complexity, the calculation speed ofthe lifting scheme is faster than the traditional wavelet transform. The hardwareacrhitecture of the lifting scheme use so little hardware resources that expand theapplication field of wavelet transform. JPEG2000image compression standard hasdefined the discrete wavelet transform as a core algorithm, after the transformation of9/7discrete wavelet transform, the energy is concentrated in the human sensitivefrequency bands, close to the human eye’s visual feature, reconstruction of digital imagehas good visual effect, at the same time the vanishing moment is high, it is good fordigital image compression coding.Based on lifting algorithm, this paper deeply studied the2-D SymmetricMask-based Discrete Wavelet Transform(2D-97SMDWT), using four different sizesof the wavelet transform coefficient templet convolution to the pixels in the originalimage, you can get a9/7two-dimensional discrete wavelet transform. This articledesign a set of parallel computing2D-97SMDWT hardware structure, make sure thefour regional wavelet transform are computing at the same time, and each region iscalculated according to the pipeline architecture, floating-point calculations deal withfixed-point, in the processing of wavelet transform using symmetric cycle continuationmethod solve the problem of the image boundary. Use Verilog language complete thehardware structure and the function of the simulation in the Modelsim and ISE10.1work platform, eventually in Xilinx company’s Virtex-2XC2VP30FPGA developmentboard to complete the commissioning work. The software use Matlab programme, andget an average error of0.0246by compare the results of software and hardware, thehighest working frequency is329.738MHz, under the condition of the workingfrequency for25MHz, the time is2.77ms to complete a wavelet transform for a256×256picture.
Keywords/Search Tags:lifting scheme, pipeline, DWT, FPGA
PDF Full Text Request
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