VLSI Design For The 2-D Discrete Wavelet Transform With Integer Lifting Scheme

With the growth of the wavelet theory, it's applied widely. In the applications of wavelets, the VLSI design has been highly required.The coefficients in the integer wavelet transform are integer, so that the perfect reconstruction and lossless compression is possible. So, the integer wavelet transform is very important in such scenarios as lossless image compression, satellite image transmission, and so on. Based on the integer wavelet transform, this article has studied 5/3 wavelet transform, and proposed a dedicated architecture to realize it. This architecture includes four parallel modules for computing, which use pipeline technology. The 5/3 wavelet transform is used as a guiding example to realize the architecture, but the architecture is general, and can be used for other integer wavelet transform with some modification of parameters. And this architecture can be expediently realized on VLSI or fitted in FPGA.At first, this article introduces the other VLSI architectures at present about the wavelet. Then the lifting scheme is introduced based on wavelet theory. The theory of integer wavelet transform is emphasized, and leads to the 5/3 wavelet transform, which is the object we focused on. Subsequently, a parallel architecture for the integer wavelet transform is present. And something about how the architecture works and some charts of this architecture are presented. At last, the architecture is described with Verilog HDL. Some simulation for the architecture shows the architecture is accurate and feasible.