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Research On Fault Model And Design Of Fault Injection Tool Based On Digital Intergrate Circuit

Posted on:2014-10-01Degree:MasterType:Thesis
Country:ChinaCandidate:L J JiangFull Text:PDF
GTID:2268330422450539Subject:Instrument Science and Technology
Abstract/Summary:PDF Full Text Request
Along with the deep use of digital intergrated chip in kinds of professionalfie lds, the requirement of reliability to digital chip is also higher. To ensure a digitalchip still in normal, repeated test and fault tolerant are needed. In course of theresearch, an effective assessment method is needed to support the algorithmverification. While fault injection technology as a reliable verification method iswidely use by researchers. It not only can apply into an evaluation of the systemstability, but also can effectively support the verification of the test and faulttolerance technology. According the reache of the popular faults in digital IC, thispaper establishes a fault injection platform which can universal apply in digital IC.First, this paper focuses on the faults which are greatly harmful to the moderndigital IC. These faults include stuck fault, flip fault, delay fault, bridge fault andintermittent fault. We not only analyze the physical cause, but also discuss the faultbehavior in logical level. Through extracte the control parameters, we establish thesynthesized fault models.This designment establishes a Digital-IC-based fault injection tool called DFIT,which can auto-inject the faults and control the fault behavior accurately. This paperintroduces the overall architecture of DFIT and describes the designment in detail.Meanwhile, this paper analyses the function, design and verification of moduleswhich compose the DFIT. These modules include fault injectior, fault parameterselector, fault clock module, communication module and fault manager. This faultinjection tool supports fixed-point fault and change the fault property in real-timewith high controllability. What’s more, DFIT supports automatic multi-faultinjection and has failure reproducibility.Finally, this paper makes simulate experiments on the ISCAS’85/89benchmark circuits to evaluate the validity of DFIT. And the platform has beenfurther verified the operability and controllability by experiment on board.
Keywords/Search Tags:Digital IC, fault model, FPGA, fault injection
PDF Full Text Request
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