The Design Of Ka-band Frequency Multiplier

Multiplier is an important part of the micro-wave and millimeter-wavecommunication system. The high efficiency, low loss and high isolation micro-waveand millimeter-wave multiplier source, whether in military or civilian, is a researchtopic worth studying.According to these requirements, this paper introduces the basic theory andanalysis method of frequency multiplier. In the analysis of the characteristics,differences, advantages and disadvantages of the different multiplier circuit, selectingthe optimal circuit structure simulation design, and getting a good result.This paper uses both active and passive frequency doubling. Combination of ADSand HFSS software, this paper accomplish the design of Ka-band diode passivefrequency multiplier and K-band FET active frequency multiplierKa-band passive frequency multiplier using both the balance and single tubestructure, frequency doubling device adopts DMK2790schottky barrier diode. Balancedstructure frequency is made of multiplier by matching circuit, the input low pass filterand output miniaturized band-pass filter. By process test, the results show that when theinput power is10dBm, frequency doubling minimum loss is8.65dB, harmonicsuppression degree greater is than20dBc.Single-tube structure multiplier is made of different matching circuit, the inputlow-pass filter and the output band-pass filter. By process test, the results show thatwhen the input power is10dBm, frequency doubling minimum loss is7.77dB,harmonic suppression degree is greater than20dBc. Test data to achieve the designrequirements, consistent with the simulation results. On the basis of measured results,the comparison between the balanced structure and the single-tube structure is offered.By contrast: the balanced structure of harmonic suppression better than the single-tubestructure, but the balance is not good grasp, likely to cause the multiplier loss increases.Active K-band FET multiplier is divided into frequency doubling parts and bufferamplifier parts. Multiplier devices using GaAs FET tube NE3514S02. Frequencymultiplication circuit and buffer amplifier circuit is made by different matching circuit of bias circuit and filter circuit. By process test, the results show that when the inputpower is about3dBm, the frequency multiplication has maximum gain. For8dBm inindicators requires the input power, output power reached more than12dBm, harmonicsuppression degree greater than20dBc, indicators meet the design requirements, andagreed with the simulation results.This paper using micro-strip line, and the substrate with Rogers RT/Duriod5880developed two multiplier, achieving miniaturization, low cost, highly efficiencypurposes.