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Design Of16Bit Clock Frequencies Of5.6MHZ Deltas-Sigma Digital To Analog Conventer

Posted on:2013-01-29Degree:MasterType:Thesis
Country:ChinaCandidate:M Y CaiFull Text:PDF
GTID:2268330392968734Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Oversanpling Delta-Sigma digital to analog conversion has become popular in recent years because it avoids many difficulties encounted with conventional methods for the digital to analog conversion, especially for those applications that call for high-resolution representation of relatively low-frequency signals. Delta-Sigma DAC take extensive use of digital signal processing, taking advantage of the fact that VLSI is better suited for providing fast digital circuits than for providing precise analog circuits, so the Delta-Sigma modulator and interpolator filter are implemented in digital area. Because their sampling rate usually needs several orders of magnitude higher than the Nyquist rate. They have found widly used in such applications as digital audio, digital telephony and instrumentation.First of all, the Delta-Sigma system behavior modeling is done. A brief summary of the reasons for introducing oversampling as a method of improving the accuracy are described in this article. Then, some basic structures of Delta-Sigma modulator are discussed, and present the architectures available for the realization of the digital noise-shaping loops. A third-order cascade-of-resonators feed-forward Delta-Sigma Modulator has been developed to convert an oversampled input digital signal. Then, the interpolation filter is analysed from structure and types. A multi-stage interpolator filter is introduced to realize over-sample-ratio (OSR). At last, a Bessel switch-capacitor (SC) analog low-pass filter is used to reconstruct the analog signal. Several specific behavioral simulations are done and design trade-off among the blocks has been discussed. What is more, the specifications of interpolation filter is depend on the over-sampling-rate and noise-shaping-loop; since the overall converter performance is limited by the analog circuitry, because a low-noise reconstruction filter is more difficult to design. By the way, the clock jetter also has a more deleterious effect on the Delta-Sigma DAC.A16-bit5.6-MHz clock-rate digital to analog converter (DAC) achieves95-dB signal-to-noise rate in the22-KHz band. The chip designed in0.18-μm CMOS integrates a Delta-Sigma DAC and all functions required for audio products.
Keywords/Search Tags:Delta-Sigma modulator, noise-shaping loop, digital interpolation filter, analog low-pass filter
PDF Full Text Request
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