Co-simulation Based Fault Injection Technologies Analysis And Design

With the continuous development of semiconductor technology, electronicsystems also have higher levels of integration and the processor performance has beengreatly improved. The characteristics of high-performance processors, low-power andhigh-performance are a huge challenge to the reliability of the processor. They affectfrequent hardware failures. In order to improve the processor’s and system’s reliability,a variety of fault-tolerant mechanisms and programs has been developed and used, sothat it is extremely important to observe the behavior of all levels in the system. Wewant to get the desired behavior in fault-tolerant mechanism layer for evaluating thevarious fault-tolerant solutions. Simulation-based fault injection has the observabilityand controllability, but cannot observe the performance of the fault in the softwarelayer as injecting the fault to the hardware level. It has some limitations. Hardware andsoftware co-simulation verification founded in hardware design process offersSimulation-based fault injection a new platform. Through Certain modifying andtailoring the hardware and software co-verification environment, we can establish aco-simulation based hierarchical fault injection system. Then the system achieves highaccuracy of fault simulation modeling and high efficiency. And it is convenient toobserve the performance of the fault from the underlying hardware to the top software.In this paper, we study the simulation environment and the fault injection platformbased on co-simulation, and research on some key technologies. We observe thebehaviors from the structural level to the operating system and applications.First, we analyze the co-simulation environment, analyze the composition and theway interaction of the verification environment, and then analyze the fault injectionplatform composition, interactive way, and implementation details of its controller, thestate collected, monitors, analyzers and other components in the fault injectionplatform.We analyze the hardware description language used in the hardware developmentprocess, and how the simulator hardware development source code is represented andmanaged. We study the compositions of VPFIT and study the methods and techniquesto accelerate the fault injection and expand fault-models for the fault injection platformbased on co-simulation.Finally, with new methods and techniques，fault injection campaigns aims at the OpenSPARC processor is carried out on the fault injection platform. We record thebehavior of the fault from the bottom to the top-level software at different levels anddistribution patterns.