Digital Image Encryption Based On Chaotic Series From Fractional Jerk System On FPGA

Digital image encryption used very frequent in information security applications, this thesisresearch which using chaotic signal generated by fractional order chaotic dynamic system fordigital image encryption communication problems, especially its implementation on FPGA.Chaotic sequence generated by fractional order differential dynamic system as a carrier ofthe confidential communications, in theory, the key is far beyond the corresponding integer orderdynamic system. One of the difficulties is that it’s much more difficult than the integer order inphysical implementation. At first, the numerical solution method of fractional order Jerk systemis optimized in this thesis, especially focuses on approximation of the selection criteria on thedata algorithm corresponding to the integer order dynamic system, use the pseudo randomsequence with sufficient accuracy and efficient enough of integer order system, successfullymake the implementation of digital image encryption on FPGA, and the development ofalgorithm was realized with FPGA hardware, digital simulation shows that the performance inencryption communication of fractional order Jerk chaotic dynamic system on FPGA is excellent,especially the security performance.